1 /* 2 * arch/sh/mm/cache-sh2.c 3 * 4 * Copyright (C) 2002 Paul Mundt 5 * 6 * Released under the terms of the GNU GPL v2.0. 7 */ 8 #include <linux/init.h> 9 #include <linux/mm.h> 10 11 #include <asm/cache.h> 12 #include <asm/addrspace.h> 13 #include <asm/processor.h> 14 #include <asm/cacheflush.h> 15 #include <asm/io.h> 16 17 /* 18 * Calculate the OC address and set the way bit on the SH-2. 19 * 20 * We must have already jump_to_P2()'ed prior to calling this 21 * function, since we rely on CCR manipulation to do the 22 * Right Thing(tm). 23 */ 24 unsigned long __get_oc_addr(unsigned long set, unsigned long way) 25 { 26 unsigned long ccr; 27 28 /* 29 * On SH-2 the way bit isn't tracked in the address field 30 * if we're doing address array access .. instead, we need 31 * to manually switch out the way in the CCR. 32 */ 33 ccr = ctrl_inl(CCR); 34 ccr &= ~0x00c0; 35 ccr |= way << cpu_data->dcache.way_shift; 36 37 /* 38 * Despite the number of sets being halved, we end up losing 39 * the first 2 ways to OCRAM instead of the last 2 (if we're 40 * 4-way). As a result, forcibly setting the W1 bit handily 41 * bumps us up 2 ways. 42 */ 43 if (ccr & CCR_CACHE_ORA) 44 ccr |= 1 << (cpu_data->dcache.way_shift + 1); 45 46 ctrl_outl(ccr, CCR); 47 48 return CACHE_OC_ADDRESS_ARRAY | (set << cpu_data->dcache.entry_shift); 49 } 50 51