init.c (8a84fc15ae5cafcc366dd85cf8e1ab2040679abc) init.c (9d4436a6fbc8c5eccdfcb8f5884e0a7b4a57f6d2)
1/*
2 * arch/sh/kernel/cpu/init.c
3 *
4 * CPU init code
5 *
6 * Copyright (C) 2002, 2003 Paul Mundt
7 * Copyright (C) 2003 Richard Curnow
8 *

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63 * during the loop to lines that have already been done, this is safe.
64 * - RPC
65 */
66 if (ccr & CCR_CACHE_ENABLE) {
67 unsigned long ways, waysize, addrstart;
68
69 waysize = cpu_data->dcache.sets;
70
1/*
2 * arch/sh/kernel/cpu/init.c
3 *
4 * CPU init code
5 *
6 * Copyright (C) 2002, 2003 Paul Mundt
7 * Copyright (C) 2003 Richard Curnow
8 *

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63 * during the loop to lines that have already been done, this is safe.
64 * - RPC
65 */
66 if (ccr & CCR_CACHE_ENABLE) {
67 unsigned long ways, waysize, addrstart;
68
69 waysize = cpu_data->dcache.sets;
70
71#ifdef CCR_CACHE_ORA
71 /*
72 * If the OC is already in RAM mode, we only have
73 * half of the entries to flush..
74 */
75 if (ccr & CCR_CACHE_ORA)
76 waysize >>= 1;
72 /*
73 * If the OC is already in RAM mode, we only have
74 * half of the entries to flush..
75 */
76 if (ccr & CCR_CACHE_ORA)
77 waysize >>= 1;
78#endif
77
78 waysize <<= cpu_data->dcache.entry_shift;
79
80#ifdef CCR_CACHE_EMODE
81 /* If EMODE is not set, we only have 1 way to flush. */
82 if (!(ccr & CCR_CACHE_EMODE))
83 ways = 1;
84 else

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80 waysize <<= cpu_data->dcache.entry_shift;
81
82#ifdef CCR_CACHE_EMODE
83 /* If EMODE is not set, we only have 1 way to flush. */
84 if (!(ccr & CCR_CACHE_EMODE))
85 ways = 1;
86 else

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