io.h (b65b34895437915f411882dd40d704eb0863ffb0) io.h (86e4dd5add77ab809f5427391dfabb8f78cbcb58)
1#ifndef __ASM_SH_IO_H
2#define __ASM_SH_IO_H
3/*
4 * Convention:
5 * read{b,w,l,q}/write{b,w,l,q} are for PCI,
6 * while in{b,w,l}/out{b,w,l} are for ISA
7 *
8 * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p

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34/*
35 * Depending on which platform we are running on, we need different
36 * I/O functions.
37 */
38#define __IO_PREFIX generic
39#include <asm/io_generic.h>
40#include <asm/io_trapped.h>
41
1#ifndef __ASM_SH_IO_H
2#define __ASM_SH_IO_H
3/*
4 * Convention:
5 * read{b,w,l,q}/write{b,w,l,q} are for PCI,
6 * while in{b,w,l}/out{b,w,l} are for ISA
7 *
8 * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p

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34/*
35 * Depending on which platform we are running on, we need different
36 * I/O functions.
37 */
38#define __IO_PREFIX generic
39#include <asm/io_generic.h>
40#include <asm/io_trapped.h>
41
42#ifdef CONFIG_HAS_IOPORT
43
42#define inb(p) sh_mv.mv_inb((p))
43#define inw(p) sh_mv.mv_inw((p))
44#define inl(p) sh_mv.mv_inl((p))
45#define outb(x,p) sh_mv.mv_outb((x),(p))
46#define outw(x,p) sh_mv.mv_outw((x),(p))
47#define outl(x,p) sh_mv.mv_outl((x),(p))
48
49#define inb_p(p) sh_mv.mv_inb_p((p))

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55
56#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
57#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
58#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
59#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
60#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
61#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
62
44#define inb(p) sh_mv.mv_inb((p))
45#define inw(p) sh_mv.mv_inw((p))
46#define inl(p) sh_mv.mv_inl((p))
47#define outb(x,p) sh_mv.mv_outb((x),(p))
48#define outw(x,p) sh_mv.mv_outw((x),(p))
49#define outl(x,p) sh_mv.mv_outl((x),(p))
50
51#define inb_p(p) sh_mv.mv_inb_p((p))

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57
58#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
59#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
60#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
61#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
62#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
63#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
64
65#endif
66
63#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
64#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
65#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
66#define __raw_writeq(v,a) (__chk_io_ptr(a), *(volatile u64 __force *)(a) = (v))
67
68#define __raw_readb(a) (__chk_io_ptr(a), *(volatile u8 __force *)(a))
69#define __raw_readw(a) (__chk_io_ptr(a), *(volatile u16 __force *)(a))
70#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))

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235#define mmio_outsw(p,s,c) __raw_writesw(p,s,c)
236#define mmio_outsl(p,s,c) __raw_writesl(p,s,c)
237
238/* synco on SH-4A, otherwise a nop */
239#define mmiowb() wmb()
240
241#define IO_SPACE_LIMIT 0xffffffff
242
67#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
68#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
69#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
70#define __raw_writeq(v,a) (__chk_io_ptr(a), *(volatile u64 __force *)(a) = (v))
71
72#define __raw_readb(a) (__chk_io_ptr(a), *(volatile u8 __force *)(a))
73#define __raw_readw(a) (__chk_io_ptr(a), *(volatile u16 __force *)(a))
74#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))

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239#define mmio_outsw(p,s,c) __raw_writesw(p,s,c)
240#define mmio_outsl(p,s,c) __raw_writesl(p,s,c)
241
242/* synco on SH-4A, otherwise a nop */
243#define mmiowb() wmb()
244
245#define IO_SPACE_LIMIT 0xffffffff
246
247#ifdef CONFIG_HAS_IOPORT
248
243/*
244 * This function provides a method for the generic case where a
245 * board-specific ioport_map simply needs to return the port + some
246 * arbitrary port base.
247 *
248 * We use this at board setup time to implicitly set the port base, and
249 * as a result, we can use the generic ioport_map.
250 */
251static inline void __set_io_port_base(unsigned long pbase)
252{
253 generic_io_base = pbase;
254}
255
256#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n))
257
249/*
250 * This function provides a method for the generic case where a
251 * board-specific ioport_map simply needs to return the port + some
252 * arbitrary port base.
253 *
254 * We use this at board setup time to implicitly set the port base, and
255 * as a result, we can use the generic ioport_map.
256 */
257static inline void __set_io_port_base(unsigned long pbase)
258{
259 generic_io_base = pbase;
260}
261
262#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n))
263
264#endif
265
258/* We really want to try and get these to memcpy etc */
259void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
260void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
261void memset_io(volatile void __iomem *, int, unsigned long);
262
263/* Quad-word real-mode I/O, don't ask.. */
264unsigned long long peek_real_address_q(unsigned long long addr);
265unsigned long long poke_real_address_q(unsigned long long addr,

--- 146 unchanged lines hidden --- 		266/* We really want to try and get these to memcpy etc */
267void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
268void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
269void memset_io(volatile void __iomem *, int, unsigned long);
270
271/* Quad-word real-mode I/O, don't ask.. */
272unsigned long long peek_real_address_q(unsigned long long addr);
273unsigned long long poke_real_address_q(unsigned long long addr,

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