io.c (8185e468446e1e2b383bd61210702fffaed3ddc0) io.c (aa4b1f6e83aaf20997edc4c10e03baf834343e5a)
1/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
8 *

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304 return v;
305}
306
307void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
308 struct omap_sdrc_params *sdrc_cs1)
309{
310 pwrdm_init(powerdomains_omap);
311 clkdm_init(clockdomains_omap, clkdm_autodeps);
1/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments
8 *

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304 return v;
305}
306
307void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
308 struct omap_sdrc_params *sdrc_cs1)
309{
310 pwrdm_init(powerdomains_omap);
311 clkdm_init(clockdomains_omap, clkdm_autodeps);
312#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
313 if (cpu_is_omap242x())
314 omap2420_hwmod_init();
315 else if (cpu_is_omap243x())
316 omap2430_hwmod_init();
317 else if (cpu_is_omap34xx())
318 omap3xxx_hwmod_init();
319 omap2_mux_init();
320 /* The OPP tables have to be registered before a clk init */
321 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
312 if (cpu_is_omap242x())
313 omap2420_hwmod_init();
314 else if (cpu_is_omap243x())
315 omap2430_hwmod_init();
316 else if (cpu_is_omap34xx())
317 omap3xxx_hwmod_init();
318 omap2_mux_init();
319 /* The OPP tables have to be registered before a clk init */
320 omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
322#endif
323
324 if (cpu_is_omap2420())
325 omap2420_clk_init();
326 else if (cpu_is_omap2430())
327 omap2430_clk_init();
328 else if (cpu_is_omap34xx())
329 omap3xxx_clk_init();
330 else if (cpu_is_omap44xx())
331 omap4xxx_clk_init();
332 else
333 pr_err("Could not init clock framework - unknown CPU\n");
334
335 omap_serial_early_init();
321
322 if (cpu_is_omap2420())
323 omap2420_clk_init();
324 else if (cpu_is_omap2430())
325 omap2430_clk_init();
326 else if (cpu_is_omap34xx())
327 omap3xxx_clk_init();
328 else if (cpu_is_omap44xx())
329 omap4xxx_clk_init();
330 else
331 pr_err("Could not init clock framework - unknown CPU\n");
332
333 omap_serial_early_init();
336#ifndef CONFIG_ARCH_OMAP4
337 omap_hwmod_late_init();
334 if (cpu_is_omap24xx() || cpu_is_omap34xx()) /* FIXME: OMAP4 */
335 omap_hwmod_late_init();
338 omap_pm_if_init();
336 omap_pm_if_init();
339 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
340 _omap2_init_reprogram_sdrc();
341#endif
337 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
338 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
339 _omap2_init_reprogram_sdrc();
340 }
342 gpmc_init();
343}
341 gpmc_init();
342}