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Searched refs:dcore_offset (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/common/
H A Dsecurity.c292 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_with_mask() argument
318 i * dcore_offset + j * instance_offset, in hl_init_pb_with_mask()
348 return hl_init_pb_with_mask(hdev, num_dcores, dcore_offset, in hl_init_pb()
372 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges_with_mask() argument
402 i * dcore_offset + j * instance_offset, in hl_init_pb_ranges_with_mask()
430 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges() argument
478 dcore_offset + i * instance_offset, in hl_init_pb_single_dcore()
525 dcore_offset + i * instance_offset, in hl_init_pb_ranges_single_dcore()
548 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_ack_pb_with_mask() argument
562 i * dcore_offset + j * instance_offset, in hl_ack_pb_with_mask()
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H A Dhabanalabs.h4076 u32 dcore_offset, u32 num_instances, u32 instance_offset,
4079 int hl_init_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset,
4084 u32 dcore_offset, u32 num_instances, u32 instance_offset,
4089 u32 dcore_offset, u32 num_instances, u32 instance_offset,
4093 int hl_init_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset,
4097 int hl_init_pb_ranges_single_dcore(struct hl_device *hdev, u32 dcore_offset,
4102 void hl_ack_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset,
4106 u32 dcore_offset, u32 num_instances, u32 instance_offset,
4108 void hl_ack_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset,
/openbmc/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2.c7452 u32 dcore_offset = dcore_id * DCORE_OFFSET; in gaudi2_mmu_dcore_prepare() local
7461 WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
7462 WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_ASID + dcore_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
7469 WREG32(mmDCORE0_EDMA1_CORE_CTX_AXUSER_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
7482 WREG32(mmDCORE0_SYNC_MNGR_MSTR_IF_AXUSER_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
7485 WREG32(mmDCORE0_MME_CTRL_LO_MME_AXUSER_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
7491 dcore_offset + ports_offset, 0); in gaudi2_mmu_dcore_prepare()
7493 dcore_offset + ports_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
7499 dcore_offset + ports_offset, 0); in gaudi2_mmu_dcore_prepare()
7501 dcore_offset + ports_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
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