/openbmc/linux/drivers/net/ethernet/neterion/ |
H A D | s2io.c | 3097 val64 = val64 | MDIO_CTRL_START_TRANS(0xE); in s2io_mdio_write() 3108 val64 = val64 | MDIO_CTRL_START_TRANS(0xE); in s2io_mdio_write() 3117 val64 = val64 | MDIO_CTRL_START_TRANS(0xE); in s2io_mdio_write() 3139 val64 = val64 | (MDIO_MMD_INDX_ADDR(addr) in s2io_mdio_read() 3143 val64 = val64 | MDIO_CTRL_START_TRANS(0xE); in s2io_mdio_read() 3153 val64 = val64 | MDIO_CTRL_START_TRANS(0xE); in s2io_mdio_read() 3188 val64 = val64 >> (index * 0x2); in s2io_chk_xpak_counter() 3189 val64 = val64 + 1; in s2io_chk_xpak_counter() 3216 val64 = val64 << (index * 0x2); in s2io_chk_xpak_counter() 4321 val64 = val64 & (~ADAPTER_LED_ON); in s2io_txpic_intr_handle() [all …]
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/openbmc/qemu/hw/misc/ |
H A D | xlnx-versal-crl.c | 35 static void crl_status_postw(RegisterInfo *reg, uint64_t val64) in crl_status_postw() argument 41 static uint64_t crl_enable_prew(RegisterInfo *reg, uint64_t val64) in crl_enable_prew() argument 44 uint32_t val = val64; in crl_enable_prew() 54 uint32_t val = val64; in crl_disable_prew() 93 return val64; in crl_rst_r5_prew() 105 return val64; in crl_rst_adma_prew() 113 return val64; in crl_rst_uart0_prew() 121 return val64; in crl_rst_uart1_prew() 129 return val64; in crl_rst_gem0_prew() 137 return val64; in crl_rst_gem1_prew() [all …]
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H A D | sifive_e_prci.c | 47 uint64_t val64, unsigned int size) in sifive_e_prci_write() argument 52 s->hfrosccfg = (uint32_t) val64; in sifive_e_prci_write() 57 s->hfxosccfg = (uint32_t) val64; in sifive_e_prci_write() 62 s->pllcfg = (uint32_t) val64; in sifive_e_prci_write() 67 s->plloutdiv = (uint32_t) val64; in sifive_e_prci_write() 71 __func__, (int)addr, (int)val64); in sifive_e_prci_write()
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H A D | sifive_test.c | 36 uint64_t val64, unsigned int size) in sifive_test_write() argument 39 int status = val64 & 0xffff; in sifive_test_write() 40 int code = (val64 >> 16) & 0xffff; in sifive_test_write() 58 __func__, (int)addr, val64); in sifive_test_write()
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H A D | stm32l4x5_exti.c | 177 uint64_t val64, unsigned int size) in stm32l4x5_exti_write() argument 182 trace_stm32l4x5_exti_write(addr, val64); in stm32l4x5_exti_write() 187 s->imr[bank] = val64 & valid_mask(bank); in stm32l4x5_exti_write() 191 s->emr[bank] = val64 & valid_mask(bank); in stm32l4x5_exti_write() 195 s->rtsr[bank] = val64 & configurable_mask(bank); in stm32l4x5_exti_write() 199 s->ftsr[bank] = val64 & configurable_mask(bank); in stm32l4x5_exti_write() 203 const uint32_t set = val64 & configurable_mask(bank); in stm32l4x5_exti_write() 217 const uint32_t cleared = s->pr[bank] & val64 & configurable_mask(bank); in stm32l4x5_exti_write()
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H A D | xlnx-zynqmp-crf.c | 31 static void ir_status_postw(RegisterInfo *reg, uint64_t val64) in ir_status_postw() argument 37 static uint64_t ir_enable_prew(RegisterInfo *reg, uint64_t val64) in ir_enable_prew() argument 40 uint32_t val = val64; in ir_enable_prew() 47 static uint64_t ir_disable_prew(RegisterInfo *reg, uint64_t val64) in ir_disable_prew() argument 50 uint32_t val = val64; in ir_disable_prew() 57 static uint64_t rst_fpd_apu_prew(RegisterInfo *reg, uint64_t val64) in rst_fpd_apu_prew() argument 60 uint32_t val = val64; in rst_fpd_apu_prew() 75 return val64; in rst_fpd_apu_prew()
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H A D | xlnx-versal-trng.c | 285 static void trng_isr_postw(RegisterInfo *reg, uint64_t val64) in trng_isr_postw() argument 294 uint32_t val = val64; in trng_ier_prew() 304 uint32_t val = val64; in trng_idr_prew() 336 uint32_t v32 = val64; in trng_int_ctrl_postw() 397 static void trng_ctrl_postw(RegisterInfo *reg, uint64_t val64) in trng_ctrl_postw() argument 405 if (FIELD_EX32(val64, CTRL, PRNGSRST)) { in trng_ctrl_postw() 411 if (!FIELD_EX32(val64, CTRL, PRNGSTART)) { in trng_ctrl_postw() 415 if (FIELD_EX32(val64, CTRL, PRNGMODE)) { in trng_ctrl_postw() 437 s->tst_seed[0] |= val64 & 1; in trng_ctrl4_postw() 488 FIELD_EX32(val64, RESET, VAL)) { in trng_reset_prew() [all …]
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H A D | xlnx-zynqmp-apu-ctrl.c | 77 static void isr_postw(RegisterInfo *reg, uint64_t val64) in isr_postw() argument 83 static uint64_t ien_prew(RegisterInfo *reg, uint64_t val64) in ien_prew() argument 86 uint32_t val = val64; in ien_prew() 93 static uint64_t ids_prew(RegisterInfo *reg, uint64_t val64) in ids_prew() argument 96 uint32_t val = val64; in ids_prew()
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H A D | xlnx-versal-xramc.c | 29 static void xram_isr_postw(RegisterInfo *reg, uint64_t val64) in xram_isr_postw() argument 35 static uint64_t xram_ien_prew(RegisterInfo *reg, uint64_t val64) in xram_ien_prew() argument 38 uint32_t val = val64; in xram_ien_prew() 45 static uint64_t xram_ids_prew(RegisterInfo *reg, uint64_t val64) in xram_ids_prew() argument 48 uint32_t val = val64; in xram_ids_prew()
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/openbmc/qemu/hw/nvram/ |
H A D | xlnx-bbram.c | 208 uint32_t val = val64; in bbram_ctrl_postw() 220 uint32_t val = val64; in bbram_pgm_mode_postw() 262 return val64; in bbram_key_prew() 300 val64 = *(uint32_t *)reg->data; in bbram_r8_prew() 303 return val64; in bbram_r8_prew() 306 static void bbram_r8_postw(RegisterInfo *reg, uint64_t val64) in bbram_r8_postw() argument 321 val64 = 0; in bbram_msw_lock_prew() 323 val64 |= s->regs[R_BBRAM_MSW_LOCK]; in bbram_msw_lock_prew() 326 return val64; in bbram_msw_lock_prew() 339 uint32_t val = val64; in bbram_ier_prew() [all …]
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H A D | xlnx-versal-efuse-ctrl.c | 233 static void efuse_isr_postw(RegisterInfo *reg, uint64_t val64) in efuse_isr_postw() argument 242 uint32_t val = val64; in efuse_ier_prew() 252 uint32_t val = val64; in efuse_idr_prew() 427 unsigned bit = val64; in efuse_pgm_addr_postw() 469 unsigned bit = val64; in efuse_rd_addr_postw() 504 if (val64 & R_EFUSE_CACHE_LOAD_LOAD_MASK) { in efuse_cache_load_prew() 519 val64 = FIELD_EX32(val64, EFUSE_PGM_LOCK, SPK_ID_LOCK); in efuse_pgm_lock_prew() 524 return val64; in efuse_pgm_lock_prew() 529 efuse_key_crc_check(reg, val64, in efuse_aes_crc_postw() 538 efuse_key_crc_check(reg, val64, in efuse_aes_u0_crc_postw() [all …]
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/openbmc/linux/drivers/hwtracing/coresight/ |
H A D | coresight-config.c | 27 *((u64 *)reg_csdev->driver_regval) = reg_csdev->reg_desc.val64; in cscfg_set_reg() 47 reg_csdev->reg_desc.val64 = *(u64 *)(reg_csdev->driver_regval); in cscfg_save_reg() 65 param_csdev->val64 = reg_csdev->reg_desc.type & CS_CFG_REG_TYPE_VAL_64BIT; in cscfg_init_reg_param() 67 if (param_csdev->val64) in cscfg_init_reg_param() 68 reg_csdev->reg_desc.val64 = param_csdev->current_value; in cscfg_init_reg_param() 130 reg_csdev->reg_desc.val64 = reg_desc->val64; in cscfg_reset_feat() 169 if (param_csdev->val64) { in cscfg_update_presets() 172 param_csdev->reg_csdev->reg_desc.val64 = val; in cscfg_update_presets() 208 if (param_csdev->val64) { in cscfg_update_curr_params() 211 param_csdev->reg_csdev->reg_desc.val64 = val; in cscfg_update_curr_params()
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/openbmc/qemu/hw/rtc/ |
H A D | xlnx-zynqmp-rtc.c | 63 static uint64_t current_time_postr(RegisterInfo *reg, uint64_t val64) in current_time_postr() argument 70 static void rtc_int_status_postw(RegisterInfo *reg, uint64_t val64) in rtc_int_status_postw() argument 76 static uint64_t rtc_int_en_prew(RegisterInfo *reg, uint64_t val64) in rtc_int_en_prew() argument 80 s->regs[R_RTC_INT_MASK] &= (uint32_t) ~val64; in rtc_int_en_prew() 85 static uint64_t rtc_int_dis_prew(RegisterInfo *reg, uint64_t val64) in rtc_int_dis_prew() argument 89 s->regs[R_RTC_INT_MASK] |= (uint32_t) val64; in rtc_int_dis_prew() 94 static void addr_error_postw(RegisterInfo *reg, uint64_t val64) in addr_error_postw() argument 100 static uint64_t addr_error_int_en_prew(RegisterInfo *reg, uint64_t val64) in addr_error_int_en_prew() argument 104 s->regs[R_ADDR_ERROR_INT_MASK] &= (uint32_t) ~val64; in addr_error_int_en_prew() 109 static uint64_t addr_error_int_dis_prew(RegisterInfo *reg, uint64_t val64) in addr_error_int_dis_prew() argument [all …]
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/openbmc/linux/drivers/gpu/drm/i915/gvt/ |
H A D | gtt.c | 314 &e->val64, 8); in gtt_get_entry64() 339 &e->val64, 8); in gtt_set_entry64() 444 return (e->val64 != 0); in gen8_gtt_test_present() 1139 se->val64 = ge->val64; in ppgtt_generate_shadow_entry() 1173 sub_se.val64 = se->val64; in split_2MB_gtt_entry() 1177 sub_se.val64 |= (se->val64 & _PAGE_PAT_LARGE) >> 5; in split_2MB_gtt_entry() 1415 old.val64 = new.val64 = 0; in sync_oos_page() 1423 if (old.val64 == new.val64 in sync_oos_page() 1429 new.val64, index); in sync_oos_page() 1772 se.val64 = 0; in invalidate_ppgtt_mm() [all …]
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/openbmc/qemu/hw/intc/ |
H A D | xlnx-zynqmp-ipi.c | 180 xlnx_zynqmp_ipi_set_trig(s, val64); in xlnx_zynqmp_ipi_trig_prew() 182 return val64; in xlnx_zynqmp_ipi_trig_prew() 185 static void xlnx_zynqmp_ipi_trig_postw(RegisterInfo *reg, uint64_t val64) in xlnx_zynqmp_ipi_trig_postw() argument 197 static uint64_t xlnx_zynqmp_ipi_isr_prew(RegisterInfo *reg, uint64_t val64) in xlnx_zynqmp_ipi_isr_prew() argument 201 xlnx_zynqmp_ipi_set_obs(s, val64); in xlnx_zynqmp_ipi_isr_prew() 203 return val64; in xlnx_zynqmp_ipi_isr_prew() 206 static void xlnx_zynqmp_ipi_isr_postw(RegisterInfo *reg, uint64_t val64) in xlnx_zynqmp_ipi_isr_postw() argument 213 static uint64_t xlnx_zynqmp_ipi_ier_prew(RegisterInfo *reg, uint64_t val64) in xlnx_zynqmp_ipi_ier_prew() argument 216 uint32_t val = val64; in xlnx_zynqmp_ipi_ier_prew() 223 static uint64_t xlnx_zynqmp_ipi_idr_prew(RegisterInfo *reg, uint64_t val64) in xlnx_zynqmp_ipi_idr_prew() argument [all …]
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/openbmc/linux/drivers/iio/imu/inv_icm42600/ |
H A D | inv_icm42600_gyro.c | 376 int64_t val64; in inv_icm42600_gyro_read_offset() local 436 if (val64 >= 0) in inv_icm42600_gyro_read_offset() 437 val64 += 2048 * 180 / 2; in inv_icm42600_gyro_read_offset() 439 val64 -= 2048 * 180 / 2; in inv_icm42600_gyro_read_offset() 440 bias = div_s64(val64, 2048 * 180); in inv_icm42600_gyro_read_offset() 452 int64_t val64, min, max; in inv_icm42600_gyro_write_offset() local 480 if (val64 < min || val64 > max) in inv_icm42600_gyro_write_offset() 490 val64 = val64 * 180LL * 2048LL; in inv_icm42600_gyro_write_offset() 492 if (val64 >= 0) in inv_icm42600_gyro_write_offset() 493 val64 += 3141592653LL * 64LL / 2LL; in inv_icm42600_gyro_write_offset() [all …]
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H A D | inv_icm42600_accel.c | 364 int64_t val64; in inv_icm42600_accel_read_offset() local 424 if (val64 >= 0) in inv_icm42600_accel_read_offset() 425 val64 += 10000LL / 2LL; in inv_icm42600_accel_read_offset() 427 val64 -= 10000LL / 2LL; in inv_icm42600_accel_read_offset() 428 bias = div_s64(val64, 10000L); in inv_icm42600_accel_read_offset() 440 int64_t val64; in inv_icm42600_accel_write_offset() local 469 if (val64 < min || val64 > max) in inv_icm42600_accel_write_offset() 479 val64 = val64 * 10000LL; in inv_icm42600_accel_write_offset() 481 if (val64 >= 0) in inv_icm42600_accel_write_offset() 482 val64 += 9806650 * 5 / 2; in inv_icm42600_accel_write_offset() [all …]
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/openbmc/qemu/tests/tcg/arm/ |
H A D | commpage.c | 48 int64_t val64 = 1; in main() local 58 fail_unless(ARM_KUSER_CMPXCHG64(&oldval, &newval, &val64) == 0); in main() 59 printf("val64 = %lld\n", val64); in main()
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/openbmc/linux/arch/mips/include/asm/ |
H A D | mips-cps.h | 26 uint64_t val64; \ 36 val64 = __raw_readl(addr_##unit##_##name() + 4); \ 37 val64 <<= 32; \ 38 val64 |= __raw_readl(addr_##unit##_##name()); \ 39 return val64; \
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/openbmc/linux/lib/zstd/common/ |
H A D | mem.h | 70 MEM_STATIC void MEM_writeLE64(void* memPtr, U64 val64); 79 MEM_STATIC void MEM_writeBE64(void* memPtr, U64 val64); 184 MEM_STATIC void MEM_writeLE64(void *memPtr, U64 val64) in MEM_writeLE64() argument 186 put_unaligned_le64(val64, memPtr); in MEM_writeLE64() 222 MEM_STATIC void MEM_writeBE64(void *memPtr, U64 val64) in MEM_writeBE64() argument 224 put_unaligned_be64(val64, memPtr); in MEM_writeBE64()
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/openbmc/qemu/hw/char/ |
H A D | sifive_uart.c | 105 uint64_t val64, unsigned int size) in sifive_uart_write() argument 108 uint32_t value = val64; in sifive_uart_write() 117 s->ie = val64; in sifive_uart_write() 121 s->txctrl = val64; in sifive_uart_write() 124 s->rxctrl = val64; in sifive_uart_write() 127 s->div = val64; in sifive_uart_write()
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/openbmc/linux/drivers/net/ethernet/marvell/octeon_ep/ |
H A D | octep_main.h | 308 #define octep_write_csr64(octep_dev, reg_off, val64) \ argument 309 writeq(val64, (octep_dev)->mmio[0].hw_addr + (reg_off)) 329 u64 val64; in OCTEP_PCI_WIN_READ() local 333 val64 = readq(oct->pci_win_regs.pci_win_rd_data); in OCTEP_PCI_WIN_READ() 336 "%s: reg: 0x%016llx val: 0x%016llx\n", __func__, addr, val64); in OCTEP_PCI_WIN_READ() 338 return val64; in OCTEP_PCI_WIN_READ()
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/openbmc/qemu/hw/pci-host/ |
H A D | i440fx.c | 143 uint64_t val64; in i440fx_pcihost_get_pci_hole_start() local 146 val64 = range_is_empty(&s->pci_hole) ? 0 : range_lob(&s->pci_hole); in i440fx_pcihost_get_pci_hole_start() 147 value = val64; in i440fx_pcihost_get_pci_hole_start() 148 assert(value == val64); in i440fx_pcihost_get_pci_hole_start() 157 uint64_t val64; in i440fx_pcihost_get_pci_hole_end() local 160 val64 = range_is_empty(&s->pci_hole) ? 0 : range_upb(&s->pci_hole) + 1; in i440fx_pcihost_get_pci_hole_end() 161 value = val64; in i440fx_pcihost_get_pci_hole_end() 162 assert(value == val64); in i440fx_pcihost_get_pci_hole_end()
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/openbmc/qemu/hw/usb/ |
H A D | xlnx-versal-usb2-ctrl-regs.c | 81 static void ir_status_postw(RegisterInfo *reg, uint64_t val64) in ir_status_postw() argument 91 static uint64_t ir_enable_prew(RegisterInfo *reg, uint64_t val64) in ir_enable_prew() argument 94 uint32_t val = val64; in ir_enable_prew() 101 static uint64_t ir_disable_prew(RegisterInfo *reg, uint64_t val64) in ir_disable_prew() argument 104 uint32_t val = val64; in ir_disable_prew()
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/openbmc/linux/tools/lib/perf/Documentation/examples/ |
H A D | sampling.c | 19 __u64 val64; member 94 u.val64 = *array; in main() 99 u.val64 = *array; in main()
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