Searched refs:tgtmode (Results 1 – 2 of 2) sorted by relevance
622 static void msr_mrs_banked_exc_checks(CPUARMState *env, uint32_t tgtmode, in msr_mrs_banked_exc_checks() argument632 if (tgtmode == ARM_CPU_MODE_HYP) { in msr_mrs_banked_exc_checks()654 if (curmode == tgtmode) { in msr_mrs_banked_exc_checks()658 if (tgtmode == ARM_CPU_MODE_USR) { in msr_mrs_banked_exc_checks()687 void HELPER(msr_banked)(CPUARMState *env, uint32_t value, uint32_t tgtmode, in HELPER()690 msr_mrs_banked_exc_checks(env, tgtmode, regno); in HELPER()694 if (tgtmode == (env->uncached_cpsr & CPSR_M)) { in HELPER()698 env->banked_spsr[bank_number(tgtmode)] = value; in HELPER()705 env->banked_r13[bank_number(tgtmode)] = value; in HELPER()708 env->banked_r14[r14_bank_number(tgtmode)] = value; in HELPER()[all …]
2683 int *tgtmode, int *regno) in msr_banked_access_decode() argument2723 *tgtmode = ARM_CPU_MODE_FIQ; in msr_banked_access_decode()2726 *tgtmode = ARM_CPU_MODE_IRQ; in msr_banked_access_decode()2729 *tgtmode = ARM_CPU_MODE_SVC; in msr_banked_access_decode()2732 *tgtmode = ARM_CPU_MODE_ABT; in msr_banked_access_decode()2735 *tgtmode = ARM_CPU_MODE_UND; in msr_banked_access_decode()2738 *tgtmode = ARM_CPU_MODE_MON; in msr_banked_access_decode()2741 *tgtmode = ARM_CPU_MODE_HYP; in msr_banked_access_decode()2752 *tgtmode = ARM_CPU_MODE_USR; in msr_banked_access_decode()2756 *tgtmode = ARM_CPU_MODE_FIQ; in msr_banked_access_decode()[all …]