| /openbmc/qemu/scripts/coccinelle/ |
| H A D | reset-type.cocci | 23 // resettable_class_set_parent_phases, and remember the function name.
34 resettable_class_set_parent_phases(rc, enterfn, holdfn, exitfn, e);
67 resettable_class_set_parent_phases(rc, enterfn, holdfn, exitfn, e);
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| /openbmc/qemu/include/hw/ |
| H A D | resettable.h | 241 void resettable_class_set_parent_phases(ResettableClass *rc,
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| /openbmc/qemu/target/tricore/ |
| H A D | cpu.c | 191 resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL, in tricore_cpu_class_init()
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| /openbmc/qemu/docs/devel/ |
| H A D | reset.rst | 144 The ``resettable_class_set_parent_phases()`` class function may be used to
198 resettable_class_set_parent_phases(rc,
207 ``resettable_class_set_parent_phases()``. For example, the following will
210 resettable_class_set_parent_phases(rc, mydev_reset_enter, NULL, NULL,
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| /openbmc/qemu/target/rx/ |
| H A D | cpu.c | 209 resettable_class_set_parent_phases(rc, NULL, rx_cpu_reset_hold, NULL, in rx_cpu_class_init()
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| /openbmc/qemu/hw/intc/ |
| H A D | arm_gicv3_its_kvm.c | 252 resettable_class_set_parent_phases(rc, NULL, kvm_arm_its_reset_hold, NULL, in kvm_arm_its_class_init()
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| H A D | arm_gic_kvm.c | 605 resettable_class_set_parent_phases(rc, NULL, kvm_arm_gic_reset_hold, NULL, in kvm_arm_gic_class_init()
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| /openbmc/qemu/hw/core/ |
| H A D | resettable.c | 267 void resettable_class_set_parent_phases(ResettableClass *rc, in resettable_class_set_parent_phases() function
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| /openbmc/qemu/hw/pci-bridge/ |
| H A D | cxl_root_port.c | 276 resettable_class_set_parent_phases(rc, NULL, cxl_rp_reset_hold, NULL, in cxl_root_port_class_init()
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| /openbmc/qemu/target/xtensa/ |
| H A D | cpu.c | 255 resettable_class_set_parent_phases(rc, NULL, xtensa_cpu_reset_hold, NULL, in xtensa_cpu_class_init()
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| /openbmc/qemu/hw/display/ |
| H A D | virtio-vga.c | 229 resettable_class_set_parent_phases(rc, NULL, virtio_vga_base_reset_hold, in virtio_vga_base_class_init()
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| /openbmc/qemu/target/sh4/ |
| H A D | cpu.c | 274 resettable_class_set_parent_phases(rc, NULL, superh_cpu_reset_hold, NULL, in superh_cpu_class_init()
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| /openbmc/qemu/target/cris/ |
| H A D | cpu.c | 275 resettable_class_set_parent_phases(rc, NULL, cris_cpu_reset_hold, NULL, in cris_cpu_class_init()
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| /openbmc/qemu/target/openrisc/ |
| H A D | cpu.c | 250 resettable_class_set_parent_phases(rc, NULL, openrisc_cpu_reset_hold, NULL, in openrisc_cpu_class_init()
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| /openbmc/qemu/hw/pci-host/ |
| H A D | pnv_phb.c | 323 resettable_class_set_parent_phases(rc, NULL, pnv_phb_root_port_reset_hold, in pnv_phb_root_port_class_init()
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| H A D | pnv_phb3_msi.c | 295 resettable_class_set_parent_phases(rc, NULL, phb3_msi_reset_hold, NULL, in phb3_msi_class_init()
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| /openbmc/qemu/target/avr/ |
| H A D | cpu.c | 229 resettable_class_set_parent_phases(rc, NULL, avr_cpu_reset_hold, NULL, in avr_cpu_class_init()
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| /openbmc/qemu/target/hexagon/ |
| H A D | cpu.c | 341 resettable_class_set_parent_phases(rc, NULL, hexagon_cpu_reset_hold, NULL, in hexagon_cpu_class_init()
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| /openbmc/qemu/target/microblaze/ |
| H A D | cpu.c | 432 resettable_class_set_parent_phases(rc, NULL, mb_cpu_reset_hold, NULL, in mb_cpu_class_init()
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| /openbmc/qemu/hw/misc/ |
| H A D | mac_via.c | 1339 resettable_class_set_parent_phases(rc, NULL, mos6522_q800_via1_reset_hold, in mos6522_q800_via1_class_init()
1427 resettable_class_set_parent_phases(rc, NULL, mos6522_q800_via2_reset_hold, in mos6522_q800_via2_class_init()
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| /openbmc/qemu/hw/input/ |
| H A D | ps2.c | 1264 resettable_class_set_parent_phases(rc, NULL, ps2_kbd_reset_hold, NULL, in ps2_kbd_class_init()
1283 resettable_class_set_parent_phases(rc, NULL, ps2_mouse_reset_hold, NULL, in ps2_mouse_class_init()
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| /openbmc/qemu/hw/misc/macio/ |
| H A D | cuda.c | 607 resettable_class_set_parent_phases(rc, NULL, mos6522_cuda_reset_hold, in mos6522_cuda_class_init()
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| H A D | pmu.c | 817 resettable_class_set_parent_phases(rc, NULL, mos6522_pmu_reset_hold, in mos6522_pmu_class_init()
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| /openbmc/qemu/target/m68k/ |
| H A D | cpu.c | 554 resettable_class_set_parent_phases(rc, NULL, m68k_cpu_reset_hold, NULL, in m68k_cpu_class_init()
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| /openbmc/qemu/target/mips/ |
| H A D | cpu.c | 576 resettable_class_set_parent_phases(rc, NULL, mips_cpu_reset_hold, NULL, in mips_cpu_class_init()
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