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Searched refs:regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c346 VCN, vcn_inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v4_0_3_mc_resume()
355 regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v4_0_3_mc_resume()
421 VCN, 0, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v4_0_3_mc_resume_dpg_mode()
430 VCN, 0, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()
440 VCN, 0, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v4_0_3_mc_resume_dpg_mode()
905 regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v4_0_3_start_sriov()
916 regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v4_0_3_start_sriov()
H A Dvcn_v4_0.c387 WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v4_0_mc_resume()
394 WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v4_0_mc_resume()
450 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v4_0_mc_resume_dpg_mode()
458 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
468 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v4_0_mc_resume_dpg_mode()
1275 regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v4_0_start_sriov()
1286 regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), in vcn_v4_0_start_sriov()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h232 #define regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH … macro
H A Dvcn_4_0_0_offset.h598 #define regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH … macro
H A Dvcn_4_0_3_offset.h600 #define regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH … macro