Searched refs:regSDMA0_F32_CNTL (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v6_0.c | 453 f32_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL)); in sdma_v6_0_enable()
455 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), f32_cntl); in sdma_v6_0_enable()
573 temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL)); in sdma_v6_0_gfx_resume()
576 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), temp); in sdma_v6_0_gfx_resume()
732 tmp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL)); in sdma_v6_0_soft_reset()
735 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), tmp); in sdma_v6_0_soft_reset()
|
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/ |
| H A D | sdma_4_4_0_offset.h | 69 #define regSDMA0_F32_CNTL … macro
|
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_11_0_0_offset.h | 1744 #define regSDMA0_F32_CNTL … macro
|
| H A D | gc_11_0_3_offset.h | 1782 #define regSDMA0_F32_CNTL … macro
|