Searched refs:phyreg_def (Results 1 – 16 of 16) sorted by relevance
67 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl8723_phy_rf_serial_read()119 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl8723_phy_rf_serial_write()181 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in rtl8723_phy_init_bb_rf_reg_def()183 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = in rtl8723_phy_init_bb_rf_reg_def()222 rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; in rtl8723_phy_init_bb_rf_reg_def()223 rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE; in rtl8723_phy_init_bb_rf_reg_def()224 rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; in rtl8723_phy_init_bb_rf_reg_def()225 rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; in rtl8723_phy_init_bb_rf_reg_def()232 rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE; in rtl8723_phy_init_bb_rf_reg_def()233 rtlphy->phyreg_def[RF90_PATH_B].rftx_afe = ROFDM0_XBTXAFE; in rtl8723_phy_init_bb_rf_reg_def()[all …]
66 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92s_phy_rf_serial_read()124 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92s_phy_rf_serial_write()693 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in _rtl92s_phy_init_register_definition()695 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = in _rtl92s_phy_init_register_definition()697 rtlphy->phyreg_def[RF90_PATH_C].rf3wire_offset = in _rtl92s_phy_init_register_definition()699 rtlphy->phyreg_def[RF90_PATH_D].rf3wire_offset = in _rtl92s_phy_init_register_definition()751 rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; in _rtl92s_phy_init_register_definition()752 rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE; in _rtl92s_phy_init_register_definition()753 rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; in _rtl92s_phy_init_register_definition()754 rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; in _rtl92s_phy_init_register_definition()[all …]
410 pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl92s_phy_rf6052_config()
76 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92c_phy_rf_serial_read()130 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92c_phy_rf_serial_write()416 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in _rtl92c_phy_init_bb_rf_register_definition()418 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = in _rtl92c_phy_init_bb_rf_register_definition()457 rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; in _rtl92c_phy_init_bb_rf_register_definition()458 rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE; in _rtl92c_phy_init_bb_rf_register_definition()459 rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; in _rtl92c_phy_init_bb_rf_register_definition()460 rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; in _rtl92c_phy_init_bb_rf_register_definition()467 rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE; in _rtl92c_phy_init_bb_rf_register_definition()468 rtlphy->phyreg_def[RF90_PATH_B].rftx_afe = ROFDM0_XBTXAFE; in _rtl92c_phy_init_bb_rf_register_definition()[all …]
145 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl88e_phy_rf_serial_read()195 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl88e_phy_rf_serial_write()827 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in _rtl88e_phy_init_bb_rf_register_definition()829 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = in _rtl88e_phy_init_bb_rf_register_definition()848 rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = in _rtl88e_phy_init_bb_rf_register_definition()850 rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = in _rtl88e_phy_init_bb_rf_register_definition()852 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = in _rtl88e_phy_init_bb_rf_register_definition()854 rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = in _rtl88e_phy_init_bb_rf_register_definition()872 rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; in _rtl88e_phy_init_bb_rf_register_definition()873 rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE; in _rtl88e_phy_init_bb_rf_register_definition()[all …]
420 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl88e_phy_rf6052_config_parafile()
244 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_rf_serial_read()292 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_rf_serial_write()416 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in _rtl92d_phy_init_bb_rf_register_definition()418 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = in _rtl92d_phy_init_bb_rf_register_definition()476 rtlphy->phyreg_def[RF90_PATH_A].rfrx_afe = ROFDM0_XARXAFE; in _rtl92d_phy_init_bb_rf_register_definition()477 rtlphy->phyreg_def[RF90_PATH_B].rfrx_afe = ROFDM0_XBRXAFE; in _rtl92d_phy_init_bb_rf_register_definition()478 rtlphy->phyreg_def[RF90_PATH_C].rfrx_afe = ROFDM0_XCRXAFE; in _rtl92d_phy_init_bb_rf_register_definition()479 rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; in _rtl92d_phy_init_bb_rf_register_definition()488 rtlphy->phyreg_def[RF90_PATH_A].rftx_afe = ROFDM0_XATXAFE; in _rtl92d_phy_init_bb_rf_register_definition()489 rtlphy->phyreg_def[RF90_PATH_B].rftx_afe = ROFDM0_XBTXAFE; in _rtl92d_phy_init_bb_rf_register_definition()[all …]
517 pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl92d_phy_rf6052_config()
139 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf_serial_read()188 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf_serial_write()1038 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_def()1041 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_def()1042 rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_def()1044 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_def()1045 rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_def()1047 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in phy_init_bb_rf_register_def()1049 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = in phy_init_bb_rf_register_def()1055 rtlphy->phyreg_def[RF90_PATH_A].rf_rb = RFPGA0_XA_LSSIREADBACK; in phy_init_bb_rf_register_def()[all …]
64 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf6052_config_parafile()
263 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl8821ae_phy_rf_serial_write()2155 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2156 rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2158 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2159 rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2164 rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RHSSIREAD_8821AE; in phy_init_bb_rf_register_definition()2165 rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RHSSIREAD_8821AE; in phy_init_bb_rf_register_definition()2167 rtlphy->phyreg_def[RF90_PATH_A].rf_rb = RA_SIREAD_8821A; in phy_init_bb_rf_register_definition()2168 rtlphy->phyreg_def[RF90_PATH_B].rf_rb = RB_SIREAD_8821A; in phy_init_bb_rf_register_definition()2170 rtlphy->phyreg_def[RF90_PATH_A].rf_rbpi = RA_PIREAD_8821A; in phy_init_bb_rf_register_definition()[all …]
388 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92c_phy_rf6052_config_parafile()
425 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl8723e_phy_rf6052_config_parafile()
424 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl8723be_phy_rf6052_config_parafile()
416 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ce_phy_rf6052_config_parafile()
1307 struct bb_reg_def phyreg_def[4]; /*Radio A/B/C/D */ member