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Searched refs:mv_xor_state_get (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dxor.c177 if (MV_ACTIVE == mv_xor_state_get(chan)) in mv_xor_mem_init()
242 enum mv_state mv_xor_state_get(u32 chan) in mv_xor_state_get() function
301 state = mv_xor_state_get(chan); in mv_xor_command_set()
359 while (mv_xor_state_get(0) != MV_IDLE) in ddr3_new_tip_ecc_scrub()
407 if (mv_xor_state_get(chan) == MV_ACTIVE) { in mv_xor_transfer()
H A Dxor.h82 enum mv_state mv_xor_state_get(u32 chan);
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dxor.c163 if (MV_ACTIVE == mv_xor_state_get(chan)) in mv_xor_mem_init()
250 if (MV_ACTIVE == mv_xor_state_get(chan)) { in mv_xor_transfer()
340 int mv_xor_state_get(u32 chan) in mv_xor_state_get() function
400 state = mv_xor_state_get(chan); in mv_xor_cmd_set()
H A Dxor.h63 int mv_xor_state_get(u32 chan);
H A Dddr3_sdram.c62 while (mv_xor_state_get(chan) != MV_IDLE) { in xor_waiton_eng()
501 while (mv_xor_state_get(chan) != MV_IDLE) in ddr3_dram_sram_burst()
H A Dddr3_hw_training.c461 while (mv_xor_state_get(0) != MV_IDLE) in ddr3_hw_training()
963 while (mv_xor_state_get(0) != MV_IDLE) in ddr3_training_suspend_resume()
/openbmc/u-boot/arch/arm/mach-mvebu/
H A Ddram.c202 while (mv_xor_state_get(SCRB_XOR_CHAN) != MV_IDLE) in dram_ecc_scrubbing()