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Searched refs:mmUVD_VCPU_CACHE_SIZE4 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_offset.h703 #define mmUVD_VCPU_CACHE_SIZE4 … macro
H A Dvcn_2_0_0_offset.h632 #define mmUVD_VCPU_CACHE_SIZE4 … macro
H A Dvcn_3_0_0_offset.h1079 #define mmUVD_VCPU_CACHE_SIZE4 … macro