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Searched refs:mmDP_DTO5_PHASE (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3549 #define mmDP_DTO5_PHASE 0x0155 macro
H A Ddce_8_0_d.h1054 #define mmDP_DTO5_PHASE 0x155 macro
H A Ddce_10_0_d.h1212 #define mmDP_DTO5_PHASE 0x155 macro
H A Ddce_11_0_d.h1024 #define mmDP_DTO5_PHASE 0x155 macro
H A Ddce_11_2_d.h1103 #define mmDP_DTO5_PHASE 0x155 macro
H A Ddce_12_0_offset.h814 #define mmDP_DTO5_PHASE … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h614 #define mmDP_DTO5_PHASE … macro
H A Ddcn_2_0_0_offset.h252 #define mmDP_DTO5_PHASE … macro
H A Ddcn_3_0_0_offset.h234 #define mmDP_DTO5_PHASE … macro