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Searched refs:mmDP3_DP_MSE_SAT0 (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3297 #define mmDP3_DP_MSE_SAT0 0x45E4 macro
H A Ddce_8_0_d.h4119 #define mmDP3_DP_MSE_SAT0 0x45e4 macro
H A Ddce_10_0_d.h4751 #define mmDP3_DP_MSE_SAT0 0x4dd2 macro
H A Ddce_11_0_d.h4810 #define mmDP3_DP_MSE_SAT0 0x4dd2 macro
H A Ddce_11_2_d.h6042 #define mmDP3_DP_MSE_SAT0 0x4dd2 macro
H A Ddce_12_0_offset.h11138 #define mmDP3_DP_MSE_SAT0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h9026 #define mmDP3_DP_MSE_SAT0 macro
H A Ddcn_1_0_offset.h9365 #define mmDP3_DP_MSE_SAT0 macro
H A Ddcn_2_1_0_offset.h10929 #define mmDP3_DP_MSE_SAT0 macro
H A Ddcn_3_0_2_offset.h10648 #define mmDP3_DP_MSE_SAT0 macro
H A Ddcn_2_0_0_offset.h12016 #define mmDP3_DP_MSE_SAT0 macro
H A Ddcn_3_0_0_offset.h11784 #define mmDP3_DP_MSE_SAT0 macro