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Searched refs:mmDP1_DP_SEC_AUD_N (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3200 #define mmDP1_DP_SEC_AUD_N 0x1FA5 macro
H A Ddce_8_0_d.h4053 #define mmDP1_DP_SEC_AUD_N 0x1fa5 macro
H A Ddce_10_0_d.h4685 #define mmDP1_DP_SEC_AUD_N 0x4bc9 macro
H A Ddce_11_0_d.h4728 #define mmDP1_DP_SEC_AUD_N 0x4bc9 macro
H A Ddce_11_2_d.h5960 #define mmDP1_DP_SEC_AUD_N 0x4bc9 macro
H A Ddce_12_0_offset.h10554 #define mmDP1_DP_SEC_AUD_N macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5854 #define mmDP1_DP_SEC_AUD_N macro
H A Ddcn_3_0_3_offset.h5363 #define mmDP1_DP_SEC_AUD_N macro
H A Ddcn_3_0_1_offset.h8330 #define mmDP1_DP_SEC_AUD_N macro
H A Ddcn_1_0_offset.h8729 #define mmDP1_DP_SEC_AUD_N macro
H A Ddcn_2_1_0_offset.h10253 #define mmDP1_DP_SEC_AUD_N macro
H A Ddcn_3_0_2_offset.h9945 #define mmDP1_DP_SEC_AUD_N macro
H A Ddcn_2_0_0_offset.h11344 #define mmDP1_DP_SEC_AUD_N macro
H A Ddcn_3_0_0_offset.h11081 #define mmDP1_DP_SEC_AUD_N macro