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Searched refs:mmDP1_DP_DPHY_CNTL (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3169 #define mmDP1_DP_DPHY_CNTL 0x1FD0 macro
H A Ddce_8_0_d.h3869 #define mmDP1_DP_DPHY_CNTL 0x1fd0 macro
H A Ddce_10_0_d.h4501 #define mmDP1_DP_DPHY_CNTL 0x4baf macro
H A Ddce_11_0_d.h4479 #define mmDP1_DP_DPHY_CNTL 0x4baf macro
H A Ddce_11_2_d.h5711 #define mmDP1_DP_DPHY_CNTL 0x4baf macro
H A Ddce_12_0_offset.h10508 #define mmDP1_DP_DPHY_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5812 #define mmDP1_DP_DPHY_CNTL … macro
H A Ddcn_3_0_3_offset.h5321 #define mmDP1_DP_DPHY_CNTL … macro
H A Ddcn_3_0_1_offset.h8288 #define mmDP1_DP_DPHY_CNTL … macro
H A Ddcn_1_0_offset.h8687 #define mmDP1_DP_DPHY_CNTL … macro
H A Ddcn_2_1_0_offset.h10211 #define mmDP1_DP_DPHY_CNTL … macro
H A Ddcn_3_0_2_offset.h9903 #define mmDP1_DP_DPHY_CNTL … macro
H A Ddcn_2_0_0_offset.h11302 #define mmDP1_DP_DPHY_CNTL … macro
H A Ddcn_3_0_0_offset.h11039 #define mmDP1_DP_DPHY_CNTL … macro