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Searched refs:mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2646 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 0x1F80 macro
H A Ddce_8_0_d.h3433 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 0x1f80 macro
H A Ddce_10_0_d.h4212 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 0x4b6f macro
H A Ddce_11_0_d.h4149 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 0x4b6f macro
H A Ddce_11_2_d.h5380 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 0x4b6f macro
H A Ddce_12_0_offset.h10458 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5756 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_3_0_3_offset.h5268 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_3_0_1_offset.h8238 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_1_0_offset.h8635 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_2_1_0_offset.h10151 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_3_0_2_offset.h9850 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_2_0_0_offset.h11244 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_3_0_0_offset.h10986 #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 … macro