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Searched refs:mmDCORE0_EDMA0_CORE_CTX_WR_COMP_ADDR_LO (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/asic_reg/
H A Ddcore0_edma0_core_ctx_regs.h71 #define mmDCORE0_EDMA0_CORE_CTX_WR_COMP_ADDR_LO 0x41CB8C0 macro
/openbmc/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2_security.c449 mmDCORE0_EDMA0_CORE_CTX_WR_COMP_ADDR_LO,
H A Dgaudi2.c10011 WREG32(mmDCORE0_EDMA0_CORE_CTX_WR_COMP_ADDR_LO + edma_offset, in gaudi2_memset_device_memory()
10065 WREG32(mmDCORE0_EDMA0_CORE_CTX_WR_COMP_ADDR_LO + edma_offset, 0); in gaudi2_memset_device_memory()