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Searched refs:mem_dq_per_write_dqs (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/altera/
H A Dsequencer.c319 rwcfg->mem_dq_per_write_dqs + 1 + dm, in scc_mgr_set_dm_in_delay()
337 rwcfg->mem_dq_per_write_dqs + 1 + dm, in scc_mgr_set_dm_out1_delay()
583 for (i = 0; i < rwcfg->mem_dq_per_write_dqs; i++) { in scc_mgr_zero_group()
643 for (i = 0; i < rwcfg->mem_dq_per_write_dqs; i++) { in scc_mgr_apply_group_dq_out1_delay()
685 for (i = 0; i < rwcfg->mem_dq_per_write_dqs; i++) in scc_mgr_apply_group_all_out_delay_add()
2178 for (i = 0; i < rwcfg->mem_dq_per_write_dqs; in search_right_edge()
2953 int left_edge[rwcfg->mem_dq_per_write_dqs]; in rw_mgr_mem_calibrate_writes_center()
2954 int right_edge[rwcfg->mem_dq_per_write_dqs]; in rw_mgr_mem_calibrate_writes_center()
2973 (rwcfg->mem_dq_per_write_dqs << 2)); in rw_mgr_mem_calibrate_writes_center()
2982 for (i = 0; i < rwcfg->mem_dq_per_write_dqs; i++) { in rw_mgr_mem_calibrate_writes_center()
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/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dwrap_sdram_config.c243 .mem_dq_per_write_dqs = RW_MGR_MEM_DQ_PER_WRITE_DQS,
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_gen5.h177 u8 mem_dq_per_write_dqs; member