| /openbmc/qemu/hw/arm/ |
| H A D | bcm2838.c | 74 DeviceState *gicdev = NULL; in bcm2838_realize() local
146 gicdev = DEVICE(&s->gic); in bcm2838_realize()
162 qdev_get_gpio_in(gicdev, in bcm2838_realize()
167 qdev_get_gpio_in(gicdev, PPI(n, GIC400_TIMER_NS_EL1_IRQ))); in bcm2838_realize()
169 qdev_get_gpio_in(gicdev, PPI(n, GIC400_TIMER_VIRT_IRQ))); in bcm2838_realize()
171 qdev_get_gpio_in(gicdev, PPI(n, GIC400_TIMER_NS_EL2_IRQ))); in bcm2838_realize()
173 qdev_get_gpio_in(gicdev, PPI(n, GIC400_TIMER_S_EL1_IRQ))); in bcm2838_realize()
176 qdev_get_gpio_in(gicdev, PPI(n, VIRTUAL_PMU_IRQ))); in bcm2838_realize()
181 qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_UART0)); in bcm2838_realize()
185 qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_AUX_UART1)); in bcm2838_realize()
[all …]
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| H A D | mps3r.c | 266 DeviceState *gicdev; in create_gic()
270 gicdev = DEVICE(&mms->gic); in create_gic()
271 qdev_prop_set_uint32(gicdev, "num-cpu", machine->smp.cpus); in create_gic()
272 qdev_prop_set_uint32(gicdev, "num-irq", NUM_SPIS + GIC_INTERNAL); in create_gic()
275 qdev_prop_set_array(gicdev, "redist-region-count", redist_region_count); in create_gic()
304 qdev_get_gpio_in(gicdev, in create_gic()
309 qdev_get_gpio_in(gicdev, in create_gic()
313 qdev_get_gpio_in(gicdev, in create_gic()
360 DeviceState *gicdev; in mps3r_common_init()
407 gicdev in mps3r_common_init()
265 DeviceState *gicdev; create_gic() local
359 DeviceState *gicdev; mps3r_common_init() local
[all...] |
| H A D | fsl-imx8mp.c | 267 DeviceState *gicdev = DEVICE(&s->gic); in fsl_imx8mp_realize()
322 qdev_prop_set_uint32(gicdev, "num-cpu", ms->smp.cpus); in fsl_imx8mp_realize()
323 qdev_prop_set_uint32(gicdev, "num-irq", in fsl_imx8mp_realize()
327 qdev_prop_set_array(gicdev, "redist-region-count", redist_region_count); in fsl_imx8mp_realize()
358 irq = qdev_get_gpio_in(gicdev, intidbase + timer_irqs[j]); in fsl_imx8mp_realize()
362 irq = qdev_get_gpio_in(gicdev, intidbase + ARCH_GIC_MAINT_IRQ); in fsl_imx8mp_realize()
366 irq = qdev_get_gpio_in(gicdev, intidbase + VIRTUAL_PMU_IRQ); in fsl_imx8mp_realize()
423 qdev_get_gpio_in(gicdev, serial_table[i].irq)); in fsl_imx8mp_realize()
434 qdev_get_gpio_in(gicdev, FSL_IMX8MP_GPT5_GPT6_IRQ)); in fsl_imx8mp_realize()
463 qdev_get_gpio_in(gicdev, gpt_irq in fsl_imx8mp_realize()
265 DeviceState *gicdev = DEVICE(&s->gic); fsl_imx8mp_realize() local
[all...] |
| H A D | aspeed_ast27x0.c | 639 DeviceState *gicdev; in aspeed_soc_ast2700_gic_realize()
644 gicdev = DEVICE(&a->gic); in aspeed_soc_ast2700_gic_realize()
645 qdev_prop_set_uint32(gicdev, "revision", 3); in aspeed_soc_ast2700_gic_realize()
646 qdev_prop_set_uint32(gicdev, "num-cpu", sc->num_cpus);
647 qdev_prop_set_uint32(gicdev, "num-irq", AST2700_MAX_IRQ + GIC_INTERNAL); in aspeed_soc_ast2700_ssp_realize()
651 qdev_prop_set_array(gicdev, "redist-region-count", redist_region_count); in aspeed_soc_ast2700_ssp_realize()
676 qdev_get_gpio_in(gicdev, intidbase + timer_irq[j])); in aspeed_soc_ast2700_ssp_realize()
679 qemu_irq irq = qdev_get_gpio_in(gicdev, in aspeed_soc_ast2700_tsp_realize()
684 qdev_get_gpio_in(gicdev, intidbase + VIRTUAL_PMU_IRQ)); in aspeed_soc_ast2700_tsp_realize()
584 DeviceState *gicdev; aspeed_soc_ast2700_gic_realize() local
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| H A D | xlnx-versal.c | 72 DeviceState *gicdev; versal_create_apu_gic() local
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| /openbmc/qemu/hw/cpu/ |
| H A D | a15mpcore.c | 54 DeviceState *gicdev; in a15mp_priv_realize() local
66 gicdev = DEVICE(&s->gic); in a15mp_priv_realize()
67 qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); in a15mp_priv_realize()
68 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in a15mp_priv_realize()
77 qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); in a15mp_priv_realize()
81 qdev_prop_set_bit(gicdev, "has-virtualization-extensions", has_el2); in a15mp_priv_realize()
113 qdev_get_gpio_in(gicdev, in a15mp_priv_realize()
118 sysbus_connect_irq(SYS_BUS_DEVICE(gicdev), i + 4 * s->num_cpu, in a15mp_priv_realize()
119 qdev_get_gpio_in(gicdev, ppibase + 25)); in a15mp_priv_realize()
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| H A D | a9mpcore.c | 51 DeviceState *scudev, *gicdev, *gtimerdev, *mptimerdev, *wdtdev; in a9mp_priv_realize() local
80 gicdev = DEVICE(&s->gic); in a9mp_priv_realize()
81 qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); in a9mp_priv_realize()
82 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in a9mp_priv_realize()
83 qdev_prop_set_uint32(gicdev, "num-priority-bits", in a9mp_priv_realize()
91 qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); in a9mp_priv_realize()
158 qdev_get_gpio_in(gicdev, ppibase + 27)); in a9mp_priv_realize()
160 qdev_get_gpio_in(gicdev, ppibase + 29)); in a9mp_priv_realize()
162 qdev_get_gpio_in(gicdev, ppibase + 30)); in a9mp_priv_realize()
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| H A D | arm11mpcore.c | 31 DeviceState *gicdev = DEVICE(&s->gic); in mpcore_priv_map_setup() local
65 qdev_get_gpio_in(gicdev, ppibase + 29)); in mpcore_priv_map_setup()
67 qdev_get_gpio_in(gicdev, ppibase + 30)); in mpcore_priv_map_setup()
76 DeviceState *gicdev = DEVICE(&s->gic); in mpcore_priv_realize() local
85 qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); in mpcore_priv_realize()
86 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in mpcore_priv_realize()
87 qdev_prop_set_uint32(gicdev, "num-priority-bits", in mpcore_priv_realize()
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