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Searched refs:gate_clks (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7.c193 .gate_clks = topc_gate_clks,
385 .gate_clks = top0_gate_clks,
567 .gate_clks = top1_gate_clks,
614 .gate_clks = ccore_gate_clks,
681 .gate_clks = peric0_gate_clks,
805 .gate_clks = peric1_gate_clks,
860 .gate_clks = peris_gate_clks,
970 .gate_clks = fsys0_gate_clks,
1101 .gate_clks = fsys1_gate_clks,
1214 .gate_clks = mscl_gate_clks,
[all …]
H A Dclk-exynos850.c499 .gate_clks = top_gate_clks,
637 .gate_clks = apm_gate_clks,
920 .gate_clks = aud_gate_clks,
1023 .gate_clks = cmgp_gate_clks,
1121 .gate_clks = g3d_gate_clks,
1223 .gate_clks = hsi_gate_clks,
1355 .gate_clks = is_gate_clks,
1464 .gate_clks = mfcmscl_gate_clks,
1640 .gate_clks = peri_gate_clks,
1747 .gate_clks = core_gate_clks,
[all …]
H A Dclk-exynos5-subcmu.h16 const struct samsung_gate_clock *gate_clks; member
H A Dclk-exynos5260.c151 .gate_clks = aud_gate_clks,
341 .gate_clks = disp_gate_clks,
505 .gate_clks = fsys_gate_clks,
596 .gate_clks = g2d_gate_clks,
659 .gate_clks = g3d_gate_clks,
792 .gate_clks = gscl_gate_clks,
911 .gate_clks = isp_gate_clks,
1031 .gate_clks = mfc_gate_clks,
1180 .gate_clks = mif_gate_clks,
1386 .gate_clks = peri_gate_clks,
[all …]
H A Dclk-exynos5-subcmu.c66 exynos5_subcmu_defer_gate(ctx, (*_cmu)->gate_clks, in exynos5_subcmus_init()
110 samsung_clk_register_gate(ctx, info->gate_clks, info->nr_gate_clks); in exynos5_subcmu_probe()
H A Dclk-exynosautov9.c953 .gate_clks = top_gate_clks,
1013 .gate_clks = busmc_gate_clks,
1071 .gate_clks = core_gate_clks,
1311 .gate_clks = fsys0_gate_clks,
1438 .gate_clks = fsys1_gate_clks,
1505 .gate_clks = fsys2_gate_clks,
1760 .gate_clks = peric0_gate_clks,
2015 .gate_clks = peric1_gate_clks,
2062 .gate_clks = peris_gate_clks,
H A Dclk-exynos7885.c340 .gate_clks = top_gate_clks,
559 .gate_clks = peri_gate_clks,
668 .gate_clks = core_gate_clks,
750 .gate_clks = fsys_gate_clks,
H A Dclk-fsd.c301 .gate_clks = cmu_gate_clks,
664 .gate_clks = peric_gate_clks,
963 .gate_clks = fsys0_gate_clks,
1135 .gate_clks = fsys1_gate_clks,
1414 .gate_clks = imem_gate_clks,
1539 .gate_clks = mfc_gate_clks,
1743 .gate_clks = cam_csi_gate_clks,
H A Dclk-exynos3250.c434 static const struct samsung_gate_clock gate_clks[] __initconst = { variable
809 .gate_clks = gate_clks,
810 .nr_gate_clks = ARRAY_SIZE(gate_clks),
1073 .gate_clks = isp_gate_clks,
H A Dclk-exynos5433.c818 .gate_clks = top_gate_clks,
901 .gate_clks = cpif_gate_clks,
1553 .gate_clks = mif_gate_clks,
2358 .gate_clks = fsys_gate_clks,
2483 .gate_clks = g2d_gate_clks,
2907 .gate_clks = disp_gate_clks,
3079 .gate_clks = aud_gate_clks,
3364 .gate_clks = g3d_gate_clks,
3507 .gate_clks = gscl_gate_clks,
4244 .gate_clks = mfc_gate_clks,
[all …]
H A Dclk.c352 if (cmu->gate_clks) in samsung_cmu_register_clocks()
353 samsung_clk_register_gate(ctx, cmu->gate_clks, in samsung_cmu_register_clocks()
H A Dclk-s5pv210.c546 static const struct samsung_gate_clock gate_clks[] __initconst = { variable
778 samsung_clk_register_gate(ctx, gate_clks, ARRAY_SIZE(gate_clks)); in __s5pv210_clk_init()
H A Dclk-exynos5420.c1332 .gate_clks = exynos5x_disp_gate_clks,
1342 .gate_clks = exynos5x_gsc_gate_clks,
1350 .gate_clks = exynos5x_g3d_gate_clks,
1360 .gate_clks = exynos5x_mfc_gate_clks,
1370 .gate_clks = exynos5x_mscl_gate_clks,
1378 .gate_clks = exynos5800_mau_gate_clks,
H A Dclk-exynos5410.c264 .gate_clks = exynos5410_gate_clks,
H A Dclk.h316 const struct samsung_gate_clock *gate_clks; member
H A Dclk-exynos5250.c680 .gate_clks = exynos5250_disp_gate_clks,
/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra-periph.c772 static struct tegra_periph_init_data gate_clks[] = { variable
894 for (i = 0; i < ARRAY_SIZE(gate_clks); i++) { in gate_clk_init()
897 data = gate_clks + i; in gate_clk_init()