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Searched refs:ctrl_reg (Results 1 – 21 of 21) sorted by relevance

/openbmc/u-boot/drivers/mmc/
H A Dmvebu_mmc.c40 u32 ctrl_reg; in mvebu_mmc_setup_data() local
47 ctrl_reg = mvebu_mmc_read(SDIO_HOST_CTRL); in mvebu_mmc_setup_data()
48 ctrl_reg |= SDIO_HOST_CTRL_TMOUT(SDIO_HOST_CTRL_TMOUT_MAX); in mvebu_mmc_setup_data()
49 mvebu_mmc_write(SDIO_HOST_CTRL, ctrl_reg); in mvebu_mmc_setup_data()
281 u32 ctrl_reg = 0; in mvebu_mmc_set_bus() local
283 ctrl_reg = mvebu_mmc_read(SDIO_HOST_CTRL); in mvebu_mmc_set_bus()
284 ctrl_reg &= ~SDIO_HOST_CTRL_DATA_WIDTH_4_BITS; in mvebu_mmc_set_bus()
288 ctrl_reg |= SDIO_HOST_CTRL_DATA_WIDTH_4_BITS; in mvebu_mmc_set_bus()
292 ctrl_reg |= SDIO_HOST_CTRL_DATA_WIDTH_1_BIT; in mvebu_mmc_set_bus()
296 ctrl_reg |= SDIO_HOST_CTRL_BIG_ENDIAN; in mvebu_mmc_set_bus()
[all …]
/openbmc/u-boot/drivers/power/regulator/
H A Das3722_regulator.c73 u8 ctrl_reg = AS3722_LDO_CONTROL0; in ldo_set_enable() local
78 ctrl_reg = AS3722_LDO_CONTROL1; in ldo_set_enable()
82 ret = pmic_clrsetbits(pmic, ctrl_reg, !enable << ldo, enable << ldo); in ldo_set_enable()
95 u8 ctrl_reg = AS3722_LDO_CONTROL0; in ldo_get_enable() local
100 ctrl_reg = AS3722_LDO_CONTROL1; in ldo_get_enable()
104 ret = pmic_reg_read(pmic, ctrl_reg); in ldo_get_enable()
H A Dpalmas_regulator.c57 adr = uc_pdata->ctrl_reg; in palmas_smps_enable()
181 adr = p->ctrl_reg; in palmas_ldo_bypass_enable()
202 adr = uc_pdata->ctrl_reg; in palmas_ldo_enable()
307 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][idx]; in palmas_ldo_probe()
312 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][9]; in palmas_ldo_probe()
315 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][10]; in palmas_ldo_probe()
376 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][0]; in palmas_smps_probe()
380 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][1]; in palmas_smps_probe()
384 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][2]; in palmas_smps_probe()
393 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][idx]; in palmas_smps_probe()
[all …]
H A Dlp873x_regulator.c30 adr = uc_pdata->ctrl_reg; in lp873x_buck_enable()
132 adr = uc_pdata->ctrl_reg; in lp873x_ldo_enable()
233 uc_pdata->ctrl_reg = lp873x_ldo_ctrl[idx]; in lp873x_ldo_probe()
287 uc_pdata->ctrl_reg = lp873x_buck_ctrl[idx]; in lp873x_buck_probe()
H A Dlp87565_regulator.c28 adr = uc_pdata->ctrl_reg; in lp87565_buck_enable()
143 uc_pdata->ctrl_reg = lp87565_buck_ctrl1[idx]; in lp87565_buck_probe()
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/
H A D0001-remoteproc-Add-Arm-remoteproc-driver.patch112 + * @ctrl_reg: address of the control register
116 + void __iomem *ctrl_reg;
175 + u32 ctrl_reg;
178 + ctrl_reg = readl(priv->reset_cfg.ctrl_reg);
179 + ctrl_reg &= ~EXTSYS_RST_CTRL_CPUWAIT;
180 + writel(ctrl_reg, priv->reset_cfg.ctrl_reg);
249 + u32 ctrl_reg;
253 + ctrl_reg = readl(priv->reset_cfg.ctrl_reg);
254 + ctrl_reg |= EXTSYS_RST_CTRL_RST_REQ;
255 + writel(ctrl_reg, priv->reset_cfg.ctrl_reg);
[all …]
/openbmc/u-boot/drivers/spi/
H A Dmxc_spi.c44 u32 ctrl_reg; member
94 unsigned int ctrl_reg; in spi_cfg_mxc() local
108 ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) | in spi_cfg_mxc()
118 ctrl_reg |= MXC_CSPICTRL_PHA; in spi_cfg_mxc()
120 ctrl_reg |= MXC_CSPICTRL_POL; in spi_cfg_mxc()
122 ctrl_reg |= MXC_CSPICTRL_SSPOL; in spi_cfg_mxc()
123 mxcs->ctrl_reg = ctrl_reg; in spi_cfg_mxc()
207 mxcs->ctrl_reg = reg_ctrl; in spi_cfg_mxc()
230 mxcs->ctrl_reg = (mxcs->ctrl_reg & in spi_xchg_single()
234 reg_write(&regs->ctrl, mxcs->ctrl_reg | MXC_CSPICTRL_EN); in spi_xchg_single()
[all …]
H A Daspeed_spi.c771 u32 ctrl_reg = flash->ce_ctrl_user | CE_CTRL_STOP_ACTIVE; in aspeed_spi_start_user() local
774 writel(ctrl_reg, &priv->regs->ce_ctrl[flash->cs]); in aspeed_spi_start_user()
/openbmc/qemu/tests/qtest/
H A Daspeed-smc-utils.c103 uint32_t ctrl_reg = R_CTRL0 + data->cs * 4; in spi_ctrl_setmode() local
104 uint32_t ctrl = spi_readl(data, ctrl_reg); in spi_ctrl_setmode()
107 spi_writel(data, ctrl_reg, ctrl); in spi_ctrl_setmode()
112 uint32_t ctrl_reg = R_CTRL0 + data->cs * 4; in spi_ctrl_start_user() local
113 uint32_t ctrl = spi_readl(data, ctrl_reg); in spi_ctrl_start_user()
116 spi_writel(data, ctrl_reg, ctrl); in spi_ctrl_start_user()
119 spi_writel(data, ctrl_reg, ctrl); in spi_ctrl_start_user()
124 uint32_t ctrl_reg = R_CTRL0 + data->cs * 4; in spi_ctrl_stop_user() local
125 uint32_t ctrl = spi_readl(data, ctrl_reg); in spi_ctrl_stop_user()
128 spi_writel(data, ctrl_reg, ctrl); in spi_ctrl_stop_user()
[all …]
/openbmc/u-boot/board/toradex/apalis-tk1/
H A Dapalis-tk1.c91 u8 ctrl_reg = AS3722_LDO_CONTROL0; in as3722_ldo_enable() local
97 ctrl_reg = AS3722_LDO_CONTROL1; in as3722_ldo_enable()
101 err = pmic_clrsetbits(pmic, ctrl_reg, 0, 1 << ldo); in as3722_ldo_enable()
/openbmc/u-boot/drivers/pinctrl/aspeed/
H A Dpinctrl_ast2500.c187 u32 *ctrl_reg = (u32*)priv->scu; in ast2500_pinctrl_group_set() local
199 clrbits_le32((u32)ctrl_reg + descs->offset, descs->reg_set); in ast2500_pinctrl_group_set()
201 setbits_le32((u32)ctrl_reg + descs->offset, descs->reg_set); in ast2500_pinctrl_group_set()
H A Dpinctrl_ast2400.c192 u32 *ctrl_reg = (u32*)priv->scu; in ast2400_pinctrl_group_set() local
204 clrbits_le32((u32)ctrl_reg + descs->offset, descs->reg_set); in ast2400_pinctrl_group_set()
206 setbits_le32((u32)ctrl_reg + descs->offset, descs->reg_set); in ast2400_pinctrl_group_set()
H A Dpinctrl_ast2600.c505 u32 ctrl_reg = (u32)priv->scu; in ast2600_pinctrl_group_set() local
516 clrbits_le32((u32)ctrl_reg + descs->offset, in ast2600_pinctrl_group_set()
519 setbits_le32((u32)ctrl_reg + descs->offset, in ast2600_pinctrl_group_set()
/openbmc/qemu/hw/misc/
H A Dzynq_slcr.c208 static uint64_t zynq_slcr_compute_pll(uint64_t input, uint32_t ctrl_reg) in zynq_slcr_compute_pll() argument
210 uint32_t mult = ((ctrl_reg & R_xxx_PLL_CTRL_PLL_FPDIV_MASK) >> in zynq_slcr_compute_pll()
214 if (ctrl_reg & R_xxx_PLL_CTRL_PLL_BYPASS_FORCE_MASK) { in zynq_slcr_compute_pll()
219 if (ctrl_reg & (R_xxx_PLL_CTRL_PLL_RESET_MASK | in zynq_slcr_compute_pll()
246 uint32_t ctrl_reg, in zynq_slcr_compute_clock() argument
249 uint32_t srcsel = extract32(ctrl_reg, 4, 2); /* bits [5:4] */ in zynq_slcr_compute_clock()
250 uint32_t divisor = extract32(ctrl_reg, 8, 6); /* bits [13:8] */ in zynq_slcr_compute_clock()
253 if (((ctrl_reg >> index) & 1u) == 0) { in zynq_slcr_compute_clock()
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dp2wi.c43 int p2wi_change_to_p2wi_mode(u8 slave_addr, u8 ctrl_reg, u8 init_data) in p2wi_change_to_p2wi_mode() argument
49 P2WI_PM_CTRL_ADDR(ctrl_reg) | in p2wi_change_to_p2wi_mode()
/openbmc/qemu/include/hw/i2c/
H A Daspeed_i2c.h391 uint32_t ctrl_reg = aspeed_i2c_bus_ctrl_offset(bus); in aspeed_i2c_bus_is_enabled() local
392 return SHARED_ARRAY_FIELD_EX32(bus->regs, ctrl_reg, MASTER_EN) || in aspeed_i2c_bus_is_enabled()
393 SHARED_ARRAY_FIELD_EX32(bus->regs, ctrl_reg, SLAVE_EN); in aspeed_i2c_bus_is_enabled()
/openbmc/qemu/include/hw/acpi/
H A Dcpu.h35 MemoryRegion ctrl_reg; member
/openbmc/u-boot/drivers/net/
H A Dxilinx_emaclite.c196 u32 ctrl_reg = __raw_readl(&regs->mdioctrl); in phyread() local
200 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl); in phyread()
224 u32 ctrl_reg = __raw_readl(&regs->mdioctrl); in phywrite() local
229 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl); in phywrite()
/openbmc/u-boot/include/power/
H A Dregulator.h178 u8 ctrl_reg; member
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dp2wi.h135 int p2wi_change_to_p2wi_mode(u8 slave_addr, u8 ctrl_reg, u8 init_data);
/openbmc/qemu/hw/acpi/
H A Dcpu.c231 memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state, in cpu_hotplug_hw_init()
233 memory_region_add_subregion(as, base_addr, &state->ctrl_reg); in cpu_hotplug_hw_init()