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Searched refs:control0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Ddmc_init_exynos4.c40 .control0 = CONTROL0_VAL,
59 writel((mem.control0 | (0 << mem.dll_on)), in phy_control_reset()
61 writel((mem.control0 | (1 << mem.dll_on)), in phy_control_reset()
108 writel((mem.control0 | CTRL_START | CTRL_DLL_ON), &dmc->phycontrol0); in dmc_init()
H A Dexynos4_setup.h412 unsigned control0; member
/openbmc/openbmc/meta-ufispace/meta-ncplite/recipes-phosphor/state/phosphor-state-manager/
H A Dchassis-control26 gpioset --hold-period 50ms -t0 power-chassis-control0=1
37 gpioset --hold-period 50ms -t0 power-chassis-control0=0