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Searched refs:V7M_CCR_DCACHE (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/armv7m/
H A Dcache.c210 setbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_DCACHE)); in dcache_enable()
228 clrbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_DCACHE)); in dcache_disable()
237 return (readl(&V7M_SCB->ccr) & BIT(V7M_CCR_DCACHE)) != 0; in dcache_status()
/openbmc/u-boot/arch/arm/include/asm/
H A Darmv7m.h55 #define V7M_CCR_DCACHE 16 macro