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Searched refs:Ser4SSSR (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/arm/mach-sa1100/
H A Dssp.c27 unsigned int status = Ser4SSSR; in ssp_interrupt()
32 Ser4SSSR = SSSR_ROR; in ssp_interrupt()
55 while (!(Ser4SSSR & SSSR_TNF)) { in ssp_write_word()
64 while (!(Ser4SSSR & SSSR_BSY)) { in ssp_write_word()
92 while (!(Ser4SSSR & SSSR_RNE)) { in ssp_read_word()
120 while (Ser4SSSR & SSSR_RNE) { in ssp_flush()
127 } while (Ser4SSSR & SSSR_BSY); in ssp_flush()
174 Ser4SSSR = SSSR_ROR; in ssp_restore_state()
202 Ser4SSSR = SSSR_ROR; in ssp_init()
/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h756 #define Ser4SSSR __REG(0x80070074) /* Ser. port 4 SSP Status Reg. */ macro
/openbmc/u-boot/include/
H A DSA-1100.h1034 #define Ser4SSSR /* Ser. port 4 SSP Status Reg. */ \ macro