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Searched refs:SPU_IRQ_ISR (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/video/fbdev/mmp/hw/
H A Dmmp_spi.c38 writel_relaxed(~SPI_IRQ_MASK, reg_base + SPU_IRQ_ISR); in lcd_spi_write()
60 isr = readl_relaxed(reg_base + SPU_IRQ_ISR); in lcd_spi_write()
63 isr = readl_relaxed(reg_base + SPU_IRQ_ISR); in lcd_spi_write()
76 writel_relaxed(~SPI_IRQ_MASK, reg_base + SPU_IRQ_ISR); in lcd_spi_write()
H A Dmmp_ctrl.c35 isr = readl_relaxed(ctrl->reg_base + SPU_IRQ_ISR); in ctrl_handle_irq()
40 tmp = readl_relaxed(ctrl->reg_base + SPU_IRQ_ISR); in ctrl_handle_irq()
42 writel_relaxed(~isr, ctrl->reg_base + SPU_IRQ_ISR); in ctrl_handle_irq()
43 } while ((isr = readl_relaxed(ctrl->reg_base + SPU_IRQ_ISR)) & imask); in ctrl_handle_irq()
H A Dmmp_ctrl.h744 #define SPU_IRQ_ISR 0x01C4 macro
/openbmc/linux/drivers/video/fbdev/
H A Dpxa168fb.c532 u32 isr = readl(fbi->reg_base + SPU_IRQ_ISR); in pxa168fb_handle_irq()
537 fbi->reg_base + SPU_IRQ_ISR); in pxa168fb_handle_irq()
H A Dpxa168fb.h436 #define SPU_IRQ_ISR 0x01C4 macro