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Searched refs:SPI_CTR_CFG_CMP1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/include/hw/ssi/
H A Dpnv_spi_regs.h33 #define SPI_CTR_CFG_CMP1 PPC_BITMASK(24, 31) macro
/openbmc/qemu/hw/ssi/
H A Dpnv_spi.c973 GETFIELD(SPI_CTR_CFG_CMP1, s->regs[SPI_CTR_CFG_REG])) { in operation_sequencer()