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Searched refs:SC_DPLLCTRL2 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/clk/
H A Ddpll-sld8.c52 tmp = readl(SC_DPLLCTRL2); in uniphier_sld8_dpll_init()
55 writel(tmp, SC_DPLLCTRL2); in uniphier_sld8_dpll_init()
H A Ddpll-pro4.c51 tmp = readl(SC_DPLLCTRL2); in uniphier_pro4_dpll_init()
53 writel(tmp, SC_DPLLCTRL2); in uniphier_pro4_dpll_init()
H A Ddpll-ld4.c47 tmp = readl(SC_DPLLCTRL2); in uniphier_ld4_dpll_init()
49 writel(tmp, SC_DPLLCTRL2); in uniphier_ld4_dpll_init()
/openbmc/u-boot/arch/arm/mach-uniphier/
H A Dsc-regs.h24 #define SC_DPLLCTRL2 (SC_BASE_ADDR | 0x1204) macro