Searched refs:QSERDES_V4_COM_CORECLK_DIV_MODE0 (Results 1 – 4 of 4) sorted by relevance
100 #define QSERDES_V4_COM_CORECLK_DIV_MODE0 0x168 macro
401 writel(0x14, edp->pll + QSERDES_V4_COM_CORECLK_DIV_MODE0); in qcom_edp_configure_pll()
894 QMP_PHY_INIT_CFG(QSERDES_V4_COM_CORECLK_DIV_MODE0, 0x0a),977 QMP_PHY_INIT_CFG(QSERDES_V4_COM_CORECLK_DIV_MODE0, 0x0a),
1136 QMP_PHY_INIT_CFG(QSERDES_V4_COM_CORECLK_DIV_MODE0, 0x05),