Searched refs:MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK (Results 1 – 2 of 2) sorted by relevance
88 MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK); in mv88e6xxx_port_set_rgmii_delay()95 reg |= MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK; in mv88e6xxx_port_set_rgmii_delay()99 MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK; in mv88e6xxx_port_set_rgmii_delay()113 reg & MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK ? "yes" : "no"); in mv88e6xxx_port_set_rgmii_delay()
89 #define MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK 0x4000 macro