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Searched refs:MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_sh_mask.h6903 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK 0x800000 macro
H A Dgmc_8_1_sh_mask.h7039 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK 0x800000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_1_sh_mask.h9644 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK … macro
H A Dmmhub_1_0_sh_mask.h9981 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK … macro
H A Dmmhub_9_3_0_sh_mask.h10111 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK … macro
H A Dmmhub_1_8_0_sh_mask.h21849 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h8563 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h8185 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h8362 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h11198 #define MC_VM_NB_PCI_CTRL__MMIOENABLE_MASK … macro