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Searched refs:MCR50_RESET_ALL_INTR (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-aspeed/
H A Dsdram_ast2600.h73 #define MCR50_RESET_ALL_INTR BIT(31) macro
/openbmc/u-boot/drivers/ram/aspeed/
H A Dsdram_ast2600.c786 writel(MCR50_RESET_ALL_INTR, &regs->intr_ctrl); in ast2600_sdrammc_common_init()
1019 clrbits_le32(&regs->intr_ctrl, MCR50_RESET_ALL_INTR); in ast2600_sdrammc_probe()