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Searched refs:LPDDR4_RTT_DQ (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing.c363 (LPDDR4_RTT_CA_BANK0 << 4) | LPDDR4_RTT_DQ) },
374 (LPDDR4_RTT_CA_BANK1 << 4) | LPDDR4_RTT_DQ) },
467 LPDDR4_RTT_DQ)/*0x4d46*/ },
475 LPDDR4_RTT_DQ)/*0x4d46*/ },/* MR12/MR11 */
495 { 0x54034, (((LPDDR4_RTT_CA << 4) | LPDDR4_RTT_DQ) << 8) },
501 { 0x5403a, (((LPDDR4_RTT_CA << 4) | LPDDR4_RTT_DQ) << 8) },
546 LPDDR4_RTT_DQ) },
553 LPDDR4_RTT_DQ) },
572 { 0x54034, (((LPDDR4_RTT_CA << 4) | LPDDR4_RTT_DQ) << 8) },
627 (LPDDR4_RTT_CA_BANK0 << 4) | LPDDR4_RTT_DQ) },
[all …]
H A Dlpddr4_timing_b0.c351 (LPDDR4_RTT_CA_BANK0 << 4) | LPDDR4_RTT_DQ) },
358 (LPDDR4_RTT_CA_BANK1 << 4) | LPDDR4_RTT_DQ) },
377 { 0x54034, (((LPDDR4_RTT_CA_BANK0 << 4) | LPDDR4_RTT_DQ) << 8) },
383 { 0x5403a, (((LPDDR4_RTT_CA_BANK1 << 4) | LPDDR4_RTT_DQ) << 8) },
429 (LPDDR4_RTT_CA_BANK0 << 4) | LPDDR4_RTT_DQ) },
435 (LPDDR4_RTT_CA_BANK1 << 4) | LPDDR4_RTT_DQ) },
454 { 0x54034, (((LPDDR4_RTT_CA_BANK0 << 4) | LPDDR4_RTT_DQ) << 8) },
460 { 0x5403a, (((LPDDR4_RTT_CA_BANK1 << 4) | LPDDR4_RTT_DQ) << 8) },
506 (LPDDR4_RTT_CA_BANK0 << 4) | LPDDR4_RTT_DQ) },
513 (LPDDR4_RTT_CA_BANK1 << 4) | LPDDR4_RTT_DQ) },
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dlpddr4_define.h83 #define LPDDR4_RTT_DQ LPDDR4_RTT40 macro