Home
last modified time | relevance | path

Searched refs:LDELAY (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/arch/arm/mach-omap2/omap3/
H A Dclock.c138 LDELAY); in dpll3_init_34xx()
192 LDELAY); in dpll3_init_34xx()
294 wait_on_value(1, 0, &prcm_base->idlest2_ckgen, LDELAY); in dpll5_init_34xx()
305 wait_on_value(1, 1, &prcm_base->idlest2_ckgen, LDELAY); in dpll5_init_34xx()
395 LDELAY); in dpll3_init_36xx()
442 LDELAY); in dpll3_init_36xx()
534 wait_on_value(1, 0, &prcm_base->idlest2_ckgen, LDELAY); in dpll5_init_36xx()
648 LDELAY); in prcm_init()
660 LDELAY); in prcm_init()
678 LDELAY); in prcm_init()
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock.c43 (void *)dpll_regs->cm_idlest_dpll, LDELAY)) { in wait_for_lock()
60 (void *)dpll_regs->cm_idlest_dpll, LDELAY)) { in wait_for_bypass()
121 u32 bound = LDELAY; in wait_for_clk_enable()
149 u32 bound = LDELAY; in wait_for_clk_disable()
/openbmc/u-boot/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c31 (u32 *)(*prcm)->prm_io_pmctrl, LDELAY)) in isolate_io()
45 (u32 *)(*prcm)->prm_io_pmctrl, LDELAY)) in isolate_io()
65 (u32 *)(base + CFG_REG_0_OFFSET), LDELAY)) in calibrate_iodelay()
77 (u32 *)(base + CFG_REG_0_OFFSET), LDELAY)) in update_delay_mechanism()
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Dclock.h10 #define LDELAY 12000000 macro
/openbmc/u-boot/arch/arm/mach-omap2/
H A Dabb.c115 if (!wait_on_value(txdone_mask, txdone_mask, (void *)txdone, LDELAY)) in abb_setup()
H A Dclocks-common.c115 LDELAY)) { in wait_for_bypass()
134 &dpll_regs->cm_idlest_dpll, LDELAY)) { in wait_for_lock()
679 u32 bound = LDELAY; in wait_for_clk_enable()
708 u32 bound = LDELAY; in wait_for_clk_disable()
758 (u32 *) (*prcm)->cm_shadow_freq_config1, LDELAY)) { in freq_update_core()
/openbmc/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dclock.h20 #define LDELAY 1000000 macro
/openbmc/u-boot/include/
H A Dlattice.h198 #define LDELAY 0x67 /* Support intelligent programming. */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-omap4/
H A Dclock.h18 #define LDELAY 1000000 macro
/openbmc/u-boot/arch/arm/include/asm/arch-omap5/
H A Dclock.h19 #define LDELAY 1000000 macro
/openbmc/u-boot/drivers/ram/
H A Dk3-am654-ddrss.c20 #define LDELAY 10000 macro
97 ddrss->ddrss_ctl_cfg + DDRSS_DDRCTL_STAT, LDELAY)) in am654_ddrss_dram_wait_for_init_complt()
302 ddrss->ddrss_phy_cfg + DDRSS_DDRPHY_PGSR0, LDELAY)) in __phy_builtin_init_routine()