Searched refs:IMX7D_USDHC3_ROOT_CLK (Results 1 – 15 of 15) sorted by relevance
207 #define IMX7D_USDHC3_ROOT_CLK 198 macro
211 #define IMX7D_USDHC3_ROOT_CLK 198 macro
272 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
212 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
232 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
323 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
389 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
379 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
404 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
522 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
631 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
1216 <&clks IMX7D_USDHC3_ROOT_CLK>;
274 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
1070 <&clks IMX7D_USDHC3_ROOT_CLK>;
814 …hws[IMX7D_USDHC3_ROOT_CLK] = imx_clk_hw_gate4("usdhc3_root_clk", "usdhc3_post_div", base + 0x46e0,… in imx7d_clocks_init()