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Searched refs:ICPU_MEMCTRL_TIMING2_FOUR_HUNDRED_NS_DLY (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/luton/
H A Dluton_icpu_cfg.h165 #define ICPU_MEMCTRL_TIMING2_FOUR_HUNDRED_NS_DLY(x) ((x) & GENMASK(15, 0)) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/
H A Dddr.h312 ICPU_MEMCTRL_TIMING2_FOUR_HUNDRED_NS_DLY(VC3_MPAR__400_ns_dly)