Searched refs:HI6220_MMC0_DIV (Results 1 – 3 of 3) sorted by relevance
116 #define HI6220_MMC0_DIV 52 macro
118 #define HI6220_MMC0_DIV 52 macro
168 { HI6220_MMC0_DIV, "mmc0_div", "mmc0_syspll", CLK_SET_RATE_PARENT, 0x494, 0, 6, 7, },