| /openbmc/qemu/target/hppa/ |
| H A D | cpu.h | 159 FIELD(FPSR, ENA_I, 0, 1)
160 FIELD(FPSR, ENA_U, 1, 1)
161 FIELD(FPSR, ENA_O, 2, 1)
165 FIELD(FPSR, D, 5, 1)
166 FIELD(FPSR, T, 6, 1)
167 FIELD(FPSR, RM, 9, 2)
168 FIELD(FPSR, CQ, 11, 11)
172 FIELD(FPSR, CQ0, 21, 1)
173 FIELD(FPSR, CA, 15, 7)
174 FIELD(FPSR, CA0, 21, 1)
[all …]
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| H A D | fpu_helper.c | 33 switch (FIELD_EX32(shadow, FPSR, RM)) { in HELPER()
49 d = FIELD_EX32(shadow, FPSR, D); in HELPER()
387 shadow = FIELD_DP32(shadow, FPSR, CQ0, FIELD_EX32(shadow, FPSR, C)); in update_fr0_cmp()
389 shadow = FIELD_DP32(shadow, FPSR, C, c); in update_fr0_cmp()
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| H A D | helper.c | 204 fpsr, flg, ena, rm[FIELD_EX32(fpsr, FPSR, RM)]); in hppa_cpu_dump_state()
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| /openbmc/linux/arch/m68k/fpsp040/ |
| H A D | kernel_ex.S | 51 | set FPSR exception status dz bit, condition code
57 | set exception status bit & accrued bits in FPSR
67 bsetb #neg_bit,FPSR_CC(%a6) |set neg bit in FPSR
68 fmovel #0,%FPSR |clr status bits (Z set)
73 fmovel #0,%FPSR |clr status bits (Z set)
84 bsetb #neg_bit,FPSR_CC(%a6) |set neg bit in FPSR
97 bsetb #neg_bit,FPSR_CC(%a6) |set neg bit in FPSR
106 | set FPSR exception status operr bit, condition code
111 | set FPSR exception status operr bit, accrued operr bit
328 | and set the FPSR bits accordingly. See the MC68040 User's Manual
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| H A D | fpsp.h | 94 .set USER_FPSR,LV+68 | saved user FPSR
95 .set FPSR_CC,USER_FPSR+0 | FPSR condition code
96 .set FPSR_QBYTE,USER_FPSR+1 | FPSR quotient
97 .set FPSR_EXCEPT,USER_FPSR+2 | FPSR exception
98 .set FPSR_AEXCEPT,USER_FPSR+3 | FPSR accrued exception
220 | FPSR/FPCR bits
244 | FPSR individual bit masks
266 | FPSR combinations used in the FPSP
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| H A D | x_unimp.S | 55 | The following lines are used to ensure that the FPSR
61 fmovel #0,%FPSR |clear all user bits
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| H A D | gen_except.S | 86 | Or in the FPSR from the emulation with the USER_FPSR on the stack.
88 fmovel %FPSR,%d0
117 | Or in the FPSR from the emulation with the USER_FPSR on the stack.
119 fmovel %FPSR,%d0
133 | Or in the FPSR from the emulation with the USER_FPSR on the stack.
135 fmovel %FPSR,%d0
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| H A D | skeleton.S | 270 | This sample handler simply clears the nan bit in the FPSR.
281 fmovel %FPSR,-(%sp)
283 fmovel (%sp)+,%FPSR
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| H A D | do_func.S | 170 fmovel #0,%FPSR |clr N flag
480 fmovemx PONE,%fp1-%fp1 |do not allow FPSR to be affected
502 | stacked FPSR to be correctly reported.
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| H A D | get_op.S | 539 fmovel #0,%FPSR |clr fpsr from decbin
544 | packed cases, but we must set the FPSR condition codes properly.
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| H A D | decbin.S | 497 fmovel %FPSR,%d0 |get status register
499 fmovel %d0,%FPSR |return status reg w/o inex2
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| H A D | scale.S | 89 fmovel #0,%FPSR |clr status from above
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| H A D | x_operr.S | 230 fmovel #0,%FPSR
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| /openbmc/linux/arch/arm/nwfpe/ |
| H A D | fpsr.h | 29 typedef unsigned int FPSR; /* type for floating point status register */ typedef
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| H A D | fpa11.h | 69 /* 96 */ FPSR fpsr; /* floating point status register */
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| H A D | fpa11.inl | 31 static inline void writeFPSR(FPSR reg)
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| /openbmc/qemu/linux-user/arm/nwfpe/ |
| H A D | fpsr.h | 40 typedef unsigned int FPSR; /* type for floating point status register */ typedef
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| H A D | fpa11.h | 73 /* 96 */ FPSR fpsr; /* floating point status register */
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| H A D | fpa11.inl | 30 static inline void writeFPSR(FPSR reg)
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| /openbmc/linux/arch/m68k/ifpsp060/src/ |
| H A D | fpsp.S | 11626 fmov.l &0x0,%fpsr # clear FPSR
11666 fmov.l &0x0,%fpsr # clear FPSR
12297 fmov.l &0x0,%fpsr # clear FPSR
13077 fmov.l &0x0,%fpsr # clear FPSR
13348 fmov.l %fpsr,%d0 # save FPSR
13556 fmov.l %fpsr,%d1 # save FPSR
13644 fmov.l %fpsr,%d1 # save FPSR
13772 fmov.l %fpsr,%d0 # save FPSR
14348 fmov.l %fpsr,%d1 # save FPSR
14371 fmov.l &0x0,%fpsr # set FPSR
[all …]
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| /openbmc/linux/Documentation/arch/arm64/ |
| H A D | sve.rst | 141 * This record is supplementary to fpsimd_context. The FPSR and FPCR registers
514 * FPSR and FPCR are retained from ARMv8-A, and interact with SVE floating-point
532 +---- //// --+ FPSR | |
571 * 2 32-bit status/control registers FPSR, FPCR
590 FPSR | |
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| /openbmc/linux/arch/m68k/ifpsp060/ |
| H A D | fskeleton.S | 189 | bit in the FPSR, and does an "rte". The instruction that caused the
190 | bsun will now be re-executed but with the NaN FPSR bit cleared.
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| H A D | CHANGES | 38 Inexact FPSR bit. Emulation now does not set Inexact for
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| H A D | fplsp.doc | 91 Upon return, fp0 holds the correct result. The FPSR is
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| /openbmc/linux/drivers/net/wireless/admtek/ |
| H A D | adm8211.h | 82 __le32 FPSR; /* 0x108 */ member
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