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Searched refs:CXL_DOWNSTREAM_PORT_MSI_OFFSET (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/pci-bridge/
H A Dcxl_downstream.c29 #define CXL_DOWNSTREAM_PORT_MSI_OFFSET 0x70 macro
150 rc = msi_init(d, CXL_DOWNSTREAM_PORT_MSI_OFFSET, in cxl_dsp_realize()