CONFIG_SYS_DDR_TIMING_3_800 (reference) in projects: openbmc

Searched refs:CONFIG_SYS_DDR_TIMING_3_800 (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/board/freescale/corenet_ds/
H A D	p4080ds_ddr.c	`36 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro 87 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800, 119 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,`
/openbmc/u-boot/board/freescale/bsc9131rdb/
H A D	spl_minimal.c	`31 __raw_writel(CONFIG_SYS_DDR_TIMING_3_800, &ddr->timing_cfg_3); in sdram_init()`
H A D	ddr.c	`22 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,`
/openbmc/u-boot/board/freescale/bsc9132qds/
H A D	spl_minimal.c	`28 __raw_writel(CONFIG_SYS_DDR_TIMING_3_800, &ddr->timing_cfg_3); in sdram_init()`
H A D	ddr.c	`21 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,`
/openbmc/u-boot/include/configs/
H A D	BSC9131RDB.h	`101 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro`
H A D	BSC9132QDS.h	`143 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro`
H A D	P1010RDB.h	`242 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro`
/openbmc/u-boot/board/freescale/p1010rdb/
H A D	ddr.c	`24 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,`
/openbmc/u-boot/scripts/
H A D	config_whitelist.txt	`2413 CONFIG_SYS_DDR_TIMING_3_800`