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Searched refs:CONFIG_DDR_HCLK (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/arm926ejs/spear/
H A Dspr600_mt47h32m16_37e_166_cl4_sync.c9 #if (CONFIG_DDR_HCLK)
H A Dspear600.c80 #if (CONFIG_DDR_HCLK) in plat_ddr_init()
H A Dspl.c34 #if (CONFIG_DDR_HCLK) in ddr_clock_init()
/openbmc/u-boot/include/configs/
H A Dx600.h223 #define CONFIG_DDR_HCLK 0 macro
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt323 CONFIG_DDR_HCLK