Home
last modified time | relevance | path

Searched refs:CONFIG_DDR_2HCLK (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/arm926ejs/spear/
H A Dspr600_mt47h32m16_333_cl5_psync.c9 #if (CONFIG_DDR_PLL2 || CONFIG_DDR_2HCLK)
15 #elif (CONFIG_DDR_2HCLK)
H A Dspr600_mt47h64m16_3_333_cl5_psync.c9 #if (CONFIG_DDR_PLL2 || CONFIG_DDR_2HCLK)
15 #elif (CONFIG_DDR_2HCLK)
H A Dspear600.c82 #elif (CONFIG_DDR_2HCLK) in plat_ddr_init()
H A Dspl.c36 #elif (CONFIG_DDR_2HCLK) in ddr_clock_init()
/openbmc/u-boot/include/configs/
H A Dx600.h222 #define CONFIG_DDR_2HCLK 1 macro
/openbmc/u-boot/scripts/
H A Dconfig_whitelist.txt312 CONFIG_DDR_2HCLK