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Searched refs:CLK_SOURCE_EMC (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra124-emc.c29 #define CLK_SOURCE_EMC 0x19c macro
105 val = readl(tegra->clk_regs + CLK_SOURCE_EMC); in emc_recalc_rate()
170 val = readl(tegra->clk_regs + CLK_SOURCE_EMC); in emc_get_parent()
260 car_value = readl(tegra->clk_regs + CLK_SOURCE_EMC); in emc_set_timing()
268 writel(car_value, tegra->clk_regs + CLK_SOURCE_EMC); in emc_set_timing()
H A Dclk-tegra210-emc.c17 #define CLK_SOURCE_EMC 0x19c macro
57 value = readl_relaxed(emc->regs + CLK_SOURCE_EMC); in tegra210_clk_emc_get_parent()
81 value = readl_relaxed(emc->regs + CLK_SOURCE_EMC); in tegra210_clk_emc_recalc_rate()
H A Dclk-tegra20.c109 #define CLK_SOURCE_EMC 0x19c macro
796 clk = tegra20_clk_register_emc(clk_base + CLK_SOURCE_EMC, false); in tegra20_periph_clk_init()
800 clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, in tegra20_periph_clk_init()
H A Dclk-tegra114.c106 #define CLK_SOURCE_EMC 0x19c macro
1052 clk_base + CLK_SOURCE_EMC, in tegra114_periph_clk_init()
1055 clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC, in tegra114_periph_clk_init()
H A Dclk-tegra30.c108 #define CLK_SOURCE_EMC 0x19c macro
1022 clk = tegra20_clk_register_emc(clk_base + CLK_SOURCE_EMC, true); in tegra30_periph_clk_init()
1026 clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, in tegra30_periph_clk_init()
H A Dclk-tegra124.c29 #define CLK_SOURCE_EMC 0x19c macro
1053 clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, in tegra124_periph_clk_init()
H A Dclk-tegra210.c34 #define CLK_SOURCE_EMC 0x19c macro
625 writel_relaxed(emc_src_value, clk_base + CLK_SOURCE_EMC); in tegra210_clk_emc_update_setting()
3041 clk_base + CLK_SOURCE_EMC, in tegra210_clk_register_mc()