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Searched refs:CLK_IFR_PWM_HCLK (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt6765-clk.h171 #define CLK_IFR_PWM_HCLK 7 macro
H A Dmediatek,mt8365-clk.h160 #define CLK_IFR_PWM_HCLK 7 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c683 GATE_IFR2(CLK_IFR_PWM_HCLK, "ifr_pwm_hclk", "axi_sel", 15),
H A Dclk-mt6765.c569 GATE_IFR2(CLK_IFR_PWM_HCLK, "ifr_pwm_hclk", "axi_ck", 15),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi431 clocks = <&infracfg CLK_IFR_PWM_HCLK>,