Searched refs:BIT17 (Results 1 – 16 of 16) sorted by relevance
48 #define BIT17 0x00020000 macro
564 #define RRSR_MCS5 BIT17698 #define IMR_TIMEOUT2 BIT17 /* Timeout interrupt 2 */745 #define RCR_BM_DATA_EN BIT17 /* Broadcast data packet interrupt enable. */1287 #define SDIO_HIMR_C2HCMD_MSK BIT171309 #define SDIO_HISR_C2HCMD BIT171378 #define BT_HWPDN_SL BIT17 /* BT HW PDn polarity control */
227 #define IMR_BCNDOK4_8723B BIT17 /* Beacon Queue DMA OK Interrupt 4 */
34 #define BIT17 0x00020000 macro
62 #define DYNAMIC_MAC_EARLY_MODE BIT17/* ODM_MAC_EARLY_MODE */
27 #define BIT17 0x00020000 macro
36 #define BIT17 0x00020000 macro
416 #define IMR_BCNDOK4_8723B BIT17 /* Beacon Queue DMA OK Interrupt 4 */
723 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); in ODM_TXPowerTrackingCheck()
383 ODM_MAC_EARLY_MODE = BIT17,
981 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); in rtw_bb_rf_gain_offset()
59 #define BIT17 0x00020000 macro
950 #define EFI_PLATFORM_MEMORY_ERROR_MODULE_HANDLE_VALID BIT171026 #define EFI_PLATFORM_MEMORY2_TARGET_ID_VALID BIT17
375 #define RRSR_MCS5 BIT17
784 #define LPFC_SLI4_INTR17 BIT17
2287 if (gsr & (BIT17 << (i*2))) in slgt_interrupt()