Searched refs:AR934X_SRIF_CPU_DPLL1_REG (Results 1 – 4 of 4) sorted by relevance
193 ar934x_srif_pll_cfg(srif_regs + AR934X_SRIF_CPU_DPLL1_REG, cpu_srif); in ar934x_pll_init()
257 pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL1_REG); in ar934x_clocks_init()
1123 #define AR934X_SRIF_CPU_DPLL1_REG 0x1c0 macro
990 #define AR934X_SRIF_CPU_DPLL1_REG 0x1c0 macro