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Searched refs:AR934X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/ar934x/
H A Dclk.c185 (0 << AR934X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) | in ar934x_pll_init()
298 ddrdiv = (ctrl >> AR934X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in ar934x_update_clock()
/openbmc/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h389 #define AR934X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 macro