/openbmc/linux/drivers/target/ |
H A D | Kconfig | 14 subsystem logic for virtual LUN 0 access
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/openbmc/phosphor-state-manager/ |
H A D | README.md | 122 Note that some of this logic is provided via service files in system-specific 123 meta layers. That is because the logic to determine if the chassis is on or if 150 The logic to check if the host is on sends a command to the host, and if a 151 response is received then similar logic to chassis is done:
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/openbmc/linux/Documentation/arch/arm/pxa/ |
H A D | mfp.rst | 7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and 19 the MFP logic and the remaining SoC peripherals:: 146 internal logic will only wakeup the system when those specific bits 156 one MFP logic associated, and is controlled by one MFP register (MFPR).
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/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | mmc-controller.yaml | 58 # inserted. Similar logic applies to the "wp-inverted" property. 65 # latter case. We choose to use the XOR logic for GPIO CD and WP 109 dedicated write-protect detection logic. If a GPIO is always used 110 for the write-protect detection logic, it is sufficient to not
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/openbmc/linux/arch/arm/mach-versatile/ |
H A D | Kconfig | 60 The IM-PD1 is an add-on logic module for the Integrator which 270 ARM core and logic (FPGA) tiles on the Versatile Express motherboard, 311 The TC2 (A15x2 A7x3) versatile express core tile integrates a logic
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/openbmc/linux/Documentation/i2c/busses/ |
H A D | i2c-mlxcpld.rst | 7 This is the Mellanox I2C controller logic, implemented in Lattice CPLD
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/openbmc/linux/Documentation/ABI/testing/ |
H A D | sysfs-class-ocxl | 45 through a vendor-specific logic block on the FPGA.
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/openbmc/openbmc/meta-arm/meta-arm/classes/ |
H A D | tfm_sign_image.bbclass | 6 # * Write the signing logic, which may call the function sign_host_image,
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/openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | microchip,mcp3911.yaml | 43 false = The DR pin state is logic high
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H A D | nxp,imx93-adc.yaml | 18 also has Self-test logic and Software-initiated calibration.
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | st,stih407-irq-syscfg.yaml | 41 these three IRQs using bitwise logic, each one being encoded respectively
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/openbmc/docs/designs/ |
H A D | power-recovery.md | 141 - Not run any power-on recovery logic when a brownout is occurring 158 - Not execute any automated power-on recovery logic to prevent power on/off 171 the `PowerRestorePolicy`. The application will then run the logic as defined in 246 start the state-manager service which executes the automated power-on logic. 248 phosphor-state-manager will ensure automated power-on recovery logic is only run 274 automated power-on recovery logic is not run if `PowerStatus` is not set to
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H A D | device-tree-gpio-naming.md | 133 logic. This GPIO is an input only. The status will reflect a regulator 154 an event into a GPIO for firmware to then utilize for different software logic. 200 Utilized to issue a processor logic reset to a IBM POWER processor.
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/openbmc/linux/Documentation/devicetree/bindings/bus/ |
H A D | nvidia,tegra20-gmi.txt | 29 or by employing external chip-select decoding logic. 31 If external chip-select logic is used to support multiple devices it is assumed
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/openbmc/openbmc/meta-ibm/recipes-phosphor/dbus/power-supply-policy/ |
H A D | power-supply-policy.yaml | 63 'Trigger logic on power supply presence state changes.' 72 'Trigger logic on chassis power state changes.'
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/openbmc/linux/Documentation/block/ |
H A D | ublk.rst | 10 ublk is a generic framework for implementing block device logic from userspace. 39 logic is totally done by userspace, such as loop's IO handling, NBD's IO 64 ublk requires userspace ublk server to handle real block device logic. 112 related, or request queue limit related, but can't be IO logic specific, 113 because the driver does not handle any IO logic. This command has to be
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/openbmc/linux/Documentation/driver-api/ |
H A D | xillybus.rst | 37 An FPGA (Field Programmable Gate Array) is a piece of logic hardware, which 62 make sense to design the FPGA's interface logic specifically for the project. 73 interface logic for the FPGA, and write a simple ad-hoc driver for the kernel. 86 their attributes), there isn't one specific chunk of logic being the Xillybus 173 to the user logic at the FPGA. Such a pipe is also seekable on the host API. 239 is based upon reprogrammable logic, a sudden disappearance from the bus is 344 In order to simplify the logic that prevents illegal boundary crossings of
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/openbmc/linux/Documentation/devicetree/bindings/clock/ti/ |
H A D | apll.txt | 8 loop logic for multiplying the input clock to a desired output
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/openbmc/linux/Documentation/devicetree/bindings/leds/ |
H A D | leds-lm36274.txt | 6 the I2C bus and/or controlled via a logic level PWM input from 60 uA to 30 mA.
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/openbmc/linux/Documentation/devicetree/bindings/iio/light/ |
H A D | capella,cm3605.yaml | 16 software logic to interface a host operating system.
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/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,spm.yaml | 15 the peripheral logic surrounding the application cores in Qualcomm platforms.
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/openbmc/linux/Documentation/devicetree/bindings/media/ |
H A D | imx.txt | 31 glue logic, also controlled from the same register block. The CSI2IPU
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/openbmc/linux/Documentation/devicetree/bindings/arm/ |
H A D | arm,coresight-cpu-debug.yaml | 59 A phandle to the debug power domain if the debug logic has its own
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/openbmc/linux/Documentation/devicetree/bindings/soc/socionext/ |
H A D | socionext,uniphier-dwc3-glue.yaml | 14 a sideband logic handling signals to DWC3 host controller inside
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/openbmc/qemu/docs/specs/ |
H A D | ppc-spapr-numa.rst | 6 Information Table (SLIT) in ACPI. The logic is explained in the LOPAPR 183 to operate under the current pseries Linux kernel logic described in 301 match in 0x2. Repeating the same logic of copying all domains up to 330 0 and 3 is 40, we calculated it as 20. This is what the current logic and 342 As mentioned above, the pSeries NUMA distance logic is, in fact, a way to approximate
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