Searched hist:cceb5f97 (Results 1 – 9 of 9) sorted by relevance
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a710/ |
H A D | branch.json | cceb5f97 Fri May 20 13:14:52 CDT 2022 Nick Forrington <nick.forrington@arm.com> perf vendors events arm64: Arm Cortex-A710
Add PMU events for Arm Cortex-A710 Update mapfile.csv
Event data based on: https://github.com/ARM-software/data/tree/master/pmu/cortex-a710.json
which is based on PMU event descriptions from the Arm Cortex-A710 Technical Reference Manual.
Mapping data (for mapfile.csv) based on: https://github.com/ARM-software/data/blob/master/cpus.json
which is based on Main ID Register (MIDR) information found in the Arm Technical Reference Manuals for individual CPUs.
Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Nick Forrington <nick.forrington@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220520181455.340344-11-nick.forrington@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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H A D | pipeline.json | cceb5f97 Fri May 20 13:14:52 CDT 2022 Nick Forrington <nick.forrington@arm.com> perf vendors events arm64: Arm Cortex-A710
Add PMU events for Arm Cortex-A710 Update mapfile.csv
Event data based on: https://github.com/ARM-software/data/tree/master/pmu/cortex-a710.json
which is based on PMU event descriptions from the Arm Cortex-A710 Technical Reference Manual.
Mapping data (for mapfile.csv) based on: https://github.com/ARM-software/data/blob/master/cpus.json
which is based on Main ID Register (MIDR) information found in the Arm Technical Reference Manuals for individual CPUs.
Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Nick Forrington <nick.forrington@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220520181455.340344-11-nick.forrington@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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H A D | bus.json | cceb5f97 Fri May 20 13:14:52 CDT 2022 Nick Forrington <nick.forrington@arm.com> perf vendors events arm64: Arm Cortex-A710
Add PMU events for Arm Cortex-A710 Update mapfile.csv
Event data based on: https://github.com/ARM-software/data/tree/master/pmu/cortex-a710.json
which is based on PMU event descriptions from the Arm Cortex-A710 Technical Reference Manual.
Mapping data (for mapfile.csv) based on: https://github.com/ARM-software/data/blob/master/cpus.json
which is based on Main ID Register (MIDR) information found in the Arm Technical Reference Manuals for individual CPUs.
Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Nick Forrington <nick.forrington@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220520181455.340344-11-nick.forrington@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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H A D | trace.json | cceb5f97 Fri May 20 13:14:52 CDT 2022 Nick Forrington <nick.forrington@arm.com> perf vendors events arm64: Arm Cortex-A710
Add PMU events for Arm Cortex-A710 Update mapfile.csv
Event data based on: https://github.com/ARM-software/data/tree/master/pmu/cortex-a710.json
which is based on PMU event descriptions from the Arm Cortex-A710 Technical Reference Manual.
Mapping data (for mapfile.csv) based on: https://github.com/ARM-software/data/blob/master/cpus.json
which is based on Main ID Register (MIDR) information found in the Arm Technical Reference Manuals for individual CPUs.
Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Nick Forrington <nick.forrington@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220520181455.340344-11-nick.forrington@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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H A D | exception.json | cceb5f97 Fri May 20 13:14:52 CDT 2022 Nick Forrington <nick.forrington@arm.com> perf vendors events arm64: Arm Cortex-A710
Add PMU events for Arm Cortex-A710 Update mapfile.csv
Event data based on: https://github.com/ARM-software/data/tree/master/pmu/cortex-a710.json
which is based on PMU event descriptions from the Arm Cortex-A710 Technical Reference Manual.
Mapping data (for mapfile.csv) based on: https://github.com/ARM-software/data/blob/master/cpus.json
which is based on Main ID Register (MIDR) information found in the Arm Technical Reference Manuals for individual CPUs.
Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Nick Forrington <nick.forrington@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220520181455.340344-11-nick.forrington@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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H A D | instruction.json | cceb5f97 Fri May 20 13:14:52 CDT 2022 Nick Forrington <nick.forrington@arm.com> perf vendors events arm64: Arm Cortex-A710
Add PMU events for Arm Cortex-A710 Update mapfile.csv
Event data based on: https://github.com/ARM-software/data/tree/master/pmu/cortex-a710.json
which is based on PMU event descriptions from the Arm Cortex-A710 Technical Reference Manual.
Mapping data (for mapfile.csv) based on: https://github.com/ARM-software/data/blob/master/cpus.json
which is based on Main ID Register (MIDR) information found in the Arm Technical Reference Manuals for individual CPUs.
Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Nick Forrington <nick.forrington@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220520181455.340344-11-nick.forrington@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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H A D | cache.json | cceb5f97 Fri May 20 13:14:52 CDT 2022 Nick Forrington <nick.forrington@arm.com> perf vendors events arm64: Arm Cortex-A710
Add PMU events for Arm Cortex-A710 Update mapfile.csv
Event data based on: https://github.com/ARM-software/data/tree/master/pmu/cortex-a710.json
which is based on PMU event descriptions from the Arm Cortex-A710 Technical Reference Manual.
Mapping data (for mapfile.csv) based on: https://github.com/ARM-software/data/blob/master/cpus.json
which is based on Main ID Register (MIDR) information found in the Arm Technical Reference Manuals for individual CPUs.
Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Nick Forrington <nick.forrington@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220520181455.340344-11-nick.forrington@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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H A D | memory.json | cceb5f97 Fri May 20 13:14:52 CDT 2022 Nick Forrington <nick.forrington@arm.com> perf vendors events arm64: Arm Cortex-A710
Add PMU events for Arm Cortex-A710 Update mapfile.csv
Event data based on: https://github.com/ARM-software/data/tree/master/pmu/cortex-a710.json
which is based on PMU event descriptions from the Arm Cortex-A710 Technical Reference Manual.
Mapping data (for mapfile.csv) based on: https://github.com/ARM-software/data/blob/master/cpus.json
which is based on Main ID Register (MIDR) information found in the Arm Technical Reference Manuals for individual CPUs.
Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Nick Forrington <nick.forrington@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220520181455.340344-11-nick.forrington@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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/openbmc/linux/tools/perf/pmu-events/arch/arm64/ |
H A D | mapfile.csv | cceb5f97 Fri May 20 13:14:52 CDT 2022 Nick Forrington <nick.forrington@arm.com> perf vendors events arm64: Arm Cortex-A710
Add PMU events for Arm Cortex-A710 Update mapfile.csv
Event data based on: https://github.com/ARM-software/data/tree/master/pmu/cortex-a710.json
which is based on PMU event descriptions from the Arm Cortex-A710 Technical Reference Manual.
Mapping data (for mapfile.csv) based on: https://github.com/ARM-software/data/blob/master/cpus.json
which is based on Main ID Register (MIDR) information found in the Arm Technical Reference Manuals for individual CPUs.
Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Nick Forrington <nick.forrington@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Andrew Kilroy <andrew.kilroy@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220520181455.340344-11-nick.forrington@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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